Abstract: Electronic drive circuitry for a solenoid that utilizes a pulse width modulation scheme is disclosed. The solenoid is connected in series with a transistor and a sense resistor. The voltage across the sense resistor is compared to a reference value to determine if an over-current condition exists within the solenoid. The circuitry operates on a repetitive time window scheme in which current is allowed to flow through the solenoid at the beginning of each time window, regardless of whether an over-current condition exists. If an over-current condition was detected at any time during the time window, then the current will be shut off to the solenoid during the next time window after the initial portion of that window. Conversely, if no over-current condition was detected during a time window, current will be allowed to flow during the entire duration of the next time window.

Abstract: A digital-to-analog converter includes a digital-to-pulse width converter that converts a desired digital set-point value to a corresponding signal having a pulse width indicative of the desired set-point value. The desired set-point value is fed to a comparator which compares that value to the current count value from a counter that is counting up in ascending integer order. However, instead of presenting the counter output signal lines to the comparator in a normal conventional manner wherein the count value of the counter is presented to the comparator in the conventional ascending integer order, the current value of the counter is presented to the comparator in other than a conventional ascending order. The result is a comparator output signal that transitions more than one time between binary logic levels. This effectively increases the frequency of the comparator output signal.

Abstract: An improved system is disclosed for downloading, verifying, and/or testing software from a remote programmer to an Electronic Engine Control ("E.E.C.") unit on a gas turbine engine. The invention includes a remote programmer that communicates with the E.E.C. unit through a serial communications link. The E.E.C. unit receives the communications through a serial memory that transmits them to a shared memory and on through a central processing unit ("C.P.U.") to a program memory. A redundant control circuit is controlled by the remote programmer and directs the E.E.C. unit through three operational modes. In a first, or download/verify, mode of operation, the E.E.C. unit may receive and store a boot program. In a second, or program memory, mode, the C.P.U. executes the boot program to allow the C.P.U. to read from and/or write to the program memory in response to communications from the serial channel. In a third, or normal, mode of operation, the C.P.U.