Abstract: An electronic system is disposed on a single integrated circuit including a plurality of power domains and a power control manager. Each power domain may be independently powered. The power control manager includes a set of control registers storing individual control bits, a power switch for each power domain and a programmable microprocessor. The programmable microprocessor controls the digital state of individual bits within the control registers thereby controlling the ON and OFF state of the corresponding power domain.

Abstract: An appliance includes a memory having at least a hidden partition of memory. The hidden partition of memory operates to store at least a portion of a program capable of contributing to one or more functions of the appliance. The appliance also includes a controller operable to process at least a portion of the program stored on the hidden portion of memory. The appliance further includes an external interface operable to provide access to at least an open portion of the memory. In one particular embodiment, the hidden portion of memory is inaccessible through the external interface. After modifying the at least a portion of the program, a decrypted update file is deleted from the open portion of memory and the external interface may be reestablished.

Abstract: A method and apparatus for adjusting the clock frequency and voltage supplied to an integrated circuit is provided. A request signal is sent to the clock, and in response, the clock lowers the clock frequency supplied to the integrated circuit. A frequency detection circuit monitors the clock signal and causes a voltage regulator to reduce the voltage supplied to the integrated circuit in response to the reduced clock frequency. Similarly, a request signal is sent to the clock, and in response, the clock raises the clock frequency supplied to the integrated circuit. The frequency detection circuit monitors the clock signal and causes a voltage regulator to raise the voltage supplied to the integrated circuit in response to the increased clock frequency. The slew rate of the clock is controlled so that at least a minimum required voltage for each operating frequency is provided while the clock frequency is being changed.

Abstract: A method and apparatus for adjusting the clock frequency and voltage supplied to an integrated circuit is provided. A request signal is sent to the clock, and in response, the clock lowers the clock frequency supplied to the integrated circuit. A frequency detection circuit monitors the clock signal and causes a voltage regulator to reduce the voltage supplied to the integrated circuit in response to the reduced clock frequency. Similarly, a request signal is sent to the clock, and in response, the clock raises the clock frequency supplied to the integrated circuit. The frequency detection circuit monitors the clock signal and causes a voltage regulator to raise the voltage supplied to the integrated circuit in response to the increased clock frequency. The slew rate of the clock is controlled so that at least a minimum required voltage for each operating frequency is provided while the clock frequency is being changed.

Abstract: An appliance includes a memory having at least a hidden partition of memory. The hidden partition of memory operates to store at least a portion of a program capable of contributing to one or more functions of the appliance. The appliance also includes a controller operable to process at least a portion of the program stored on the hidden portion of memory. The appliance further includes an external interface operable to provide access to at least an open portion of the memory. In one particular embodiment, the hidden portion of memory is inaccessible through the external interface.