Abstract: In a magneto-optical recording method and, more particularly, a bit position recording method, laser beam intensity is pulse-modulated between high and low levels according to data to be recorded. The modulated laser beam is radiated on a recording medium under the presence of a bias field. High-level emission time of the laser beam is shortened at the inner portion of the medium, and is prolonged at the outer portion. Low-level intensity of the laser beam is decreased at the inner portion of the medium, and is increased at the outer portion, thereby increasing C/N ratio upon reproduction.

Abstract: The present invention comprises circuitry for encoding and decoding data according to a (1,8) run-length-limited, variable-length code word scheme. The encoder comprises three four-stage shift registers, two groups of logic gates and a final set of flip flops for clocking the encoding data at twice the incoming data frequency. One set of logic gates uses the outputs of each shift register to produce the encoded data, which is then reclocked at the data frequency. The other set of logic gates uses the outputs of all three sets of shift registers to locate the word boundaries, and supplies this information as input to the third shift register. The decoder consists of a twelve-stage shift register, two sets of logic gates, three single flip flops and a two-to-one multiplexer. One set of logic gates provides decoding for the odd-numbered encoded bits and the other set decodes the even numbered bits.

Abstract: An improved circuit for encoding data to be stored according to a 2,7 run-length limited code is disclosed, which features substantial simplification compared with prior art circuitry. The simplified circuit uses half as many memory elements as the prior art circuit and employs Boolean identities to simplify the logic elements encoding the data. In a preferred embodiment, the circuit is implemented using emitter-coupled logic. If necessary, the capacitance required by resistor-capacitor networks used to eliminate race conditions may be formed between a planar conductor on one side of a circuit board on which the circuit is laid out and a circuit element on the other.