Abstract: Circuitry is provided for a precision integrated circuit operational amplifier having a complementary pair of differential amplifiers in the input stage. Each differential amplifier is operable over a portion of the common-mode input range to provide a common-mode input range that includes both positive and negative power supply voltages. Methods are provided for trimming the operational amplifier to reduce the input offset voltage of each input stage differential amplifier which reduces the input offset voltage for the operational amplifier as a whole.

Abstract: A blend control circuit for attenuating the L-R signal in a stereo system as a function of a d-c control potential. The circuit is designed to operate with a very low supply voltage and to provide a nearly linear control of stereo separation as a function of control potential.

Abstract: A circuit is disclosed for operating an MOS transistor in its resistive mode. A cascode transistor is used to clamp the voltage across the resistive transistor to the required level. The circuit gain can be controlled by controlling voltage across the resistive transistor.

Abstract: A CMOS op amp is disclosed in which one op amp is programmed with a controlled offset voltage and a reference current. The amplifier is constructed so that its gain adjusts to where its output current equals the reference current. Thus its G.sub.m equals the reference current divided by the offset voltage. Other such amplifiers can be slaved to the programmed amplifier so that a plurality of amplifiers can be simultaneously programmed.

Abstract: A modulator circuit is disclosed in which a pair of differentially modulated direct currents are mirrored to an output. A control potential acts to vary the modulation without changing the direct current values. A CMOS version of a complete variable gain amplifier is detailed in which the common mode output is V.sub.CC /2 and is not changed with variations in the gain control potential or the input common mode potential.

Abstract: In an FM receiver a multiplier is driven from the IF limiter. The limiter also drives a single tuned circuit which produces a quadrature signal that drives a second port in the multiplier. When the quadrature signal is multiplied by the IF signal an FM detector results. The center frequency is determined by the frequency of the quadrature relationship and the extent of the resultant output curve is determined by the Q of the tuned circuit. The output response is linearized by varying the current in the multiplier as a function of the IF signal deviation.

Abstract: The voltage regulator circuit includes a Darlington pass device, a feedback circuit and an error amplifier connected between the feedback circuit and the Darlington pass device. The error amplifier is arranged to conduct a current which is proportional to the control current of the pass device so that under standby conditions when the control current of the pass device has a low magnitude the power dissipation of the voltage regulator is minimized. A high voltage sustaining transistor, which is connected between the pass device and the error amplifier, is arranged to have a high voltage sustaining capability.

Abstract: A crystal oscillator is provided a portion of which is fabricated in monolithic integrated circuit form. The circuit is temperature-compensated and utilizes a single 5 volt DC power supply compatible with NMOS and TTL voltage levels. The duty cycle of the oscillator may be varied between approximately 30 and 70 percent.

Abstract: A voltage controlled crystal oscillator is disclosed suitable to be included in a subcarrier regeneration stage for a color television receiver. The oscillator includes a novel phase shifting network in the feedback loop thereof for maintaining the oscillator in phase synchronism with a received NTSC reference burst signal. The phase shifting network comprises a first differential amplifier being adapted to receive a voltage oscillation signal having a 90.degree. phase lag with respect to the oscillation signal generated by the crystal. The differential outputs from the first differential amplifier are respectively connected to the common terminal of a second differential amplifier and to a phase shifting circuit. The output of the phase shifting circuit is a first current signal having a predetermined phase relation to the input signal applied thereto.