Patents by Inventor William B. Lipp

William B. Lipp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090141719
    Abstract: Methods, systems, and apparatuses related to a communication switch are disclosed herein. In some embodiments, the communication switch may be configured to transmit TDM, ATM and/or packet data from an ingress service processor, through a plurality of switch elements, to an egress service processor. Other embodiments may be described and claimed.
    Type: Application
    Filed: November 17, 2008
    Publication date: June 4, 2009
    Applicant: TR TECHNOLOGIES FOUNDATION LLC
    Inventors: Subhash C. Roy, David K. Toebes, Michael M. Renault, Steven E. Benoit, Igor Zhovnirovsky, Daniel C. Upp, William B. Lipp
  • Patent number: 6646983
    Abstract: A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12×12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13.89 microseconds. Each slot includes a 4-bit tag plus a 4-byte payload. The slot bandwidth is 2.592 Mbps which is large enough to carry an E-1 signal with overhead. The 4-bit tag is a cross connect pointer which is setup when a TDM connection is provisioned.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: November 11, 2003
    Assignee: Transwitch Corporation
    Inventors: Subhash C. Roy, Santanu Das, Daniel C. Upp, William B. Lipp, Jitender K. Vij, Michael M. Renault
  • Patent number: 6636515
    Abstract: A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12×12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13.89 microseconds. Each slot includes a 4-bit tag plus a 4-byte payload. The slot bandwidth is 2.592 Mbps which is large enough to carry an E-1 signal with overhead. The 4-bit tag is a cross connect pointer which is setup when a TDM connection is provisioned.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: October 21, 2003
    Assignee: Transwitch Corporation
    Inventors: Subhash C. Roy, Santanu Das, Daniel C. Upp, William B. Lipp, Jitender K. Vij, Michael M. Renault, Frederick R. Carter, Rajen S. Ramchandani
  • Patent number: 6631130
    Abstract: A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12×12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13.89 microseconds. Each slot includes a 4-bit tag plus a 4-byte payload. The slot bandwidth is 2.592 Mbps which is large enough to carry an E-1 signal with overhead. The 4-bit tag is a cross connect pointer which is setup when a TDM connection is provisioned.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: October 7, 2003
    Assignee: Transwitch Corporation
    Inventors: Subhash C. Roy, Daniel C. Upp, William B. Lipp, Steven E. Benoit, Michael M. Renault
  • Patent number: 6243359
    Abstract: The apparatus includes a separate line side inlet queue for each GFR VC, a single network side outlet queue for all GFR VCs, a single network side inlet queue for all GFR VCs, a single line side outlet bulk processing queue with a post queue packet processor followed by separate line side outlet queues for each line, a network side outlet queue monitor, and a line side inlet queue controller. The network side outlet queue monitor is coupled to the line side inlet queue controller so that the network side outlet queue monitor can send messages to the line side inlet queue controller. According to one of the methods of the invention, the network side outlet queue monitor sends messages to the line side inlet queue controller directing the line side inlet queue controller to send data from the line side GFR queues based on the status of the network side outlet GFR queue. According to another method of the invention, the line to side inlet queue controller discards packets for a GFR VC if congestion is indicated.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: June 5, 2001
    Assignee: TranSwitch Corp
    Inventors: Subhash C. Roy, William B. Lipp, Daniel C. Upp, Alberto Bricca