Patents by Inventor William B. Weeber
William B. Weeber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11309966Abstract: A method and apparatus for latency control in an optical network. A management node such as an OLT in a PON sends a discovery message intending to prompt joining network nodes such as ONUs to send a response on a first wavelength during a quiet window established for this purpose. When a response is received, a secondary upstream-transmission wavelength is assigned to the ONU. When the ONU sends data upstream according to a schedule calculated by the ONT, which schedule may include transmission times using the assigned secondary wavelength. In this case, the assigned secondary wavelength will be scheduled using a relatively smaller or no quiet window. This scheduling may be determined in part by the service or services used by the ONU.Type: GrantFiled: August 3, 2020Date of Patent: April 19, 2022Assignee: NOKIA OF AMERICA CORPORATIONInventors: William B. Weeber, Timothy J. Williams
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Publication number: 20210075512Abstract: A method and apparatus for latency control in an optical network. A management node such as an OLT in a PON sends a discovery message intending to prompt joining network nodes such as ONUs to send a response on a first wavelength during a quiet window established for this purpose. When a response is received, a secondary upstream-transmission wavelength is assigned to the ONU. When the ONU sends data upstream according to a schedule calculated by the ONT, which schedule may include transmission times using the assigned secondary wavelength. In this case, the assigned secondary wavelength will be scheduled using a relatively smaller or no quiet window. This scheduling may be determined in part by the service or services used by the ONU.Type: ApplicationFiled: August 3, 2020Publication date: March 11, 2021Inventors: William B. Weeber, Timothy J. Williams
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Patent number: 10735098Abstract: A method and apparatus for latency control in an optical network. A management node such as an OLT in a PON sends a discovery message intending to prompt joining network nodes such as ONUs to send a response on a first wavelength during a quiet window established for this purpose. When a response is received, a secondary upstream-transmission wavelength is assigned to the ONU. When the ONU sends data upstream according to a schedule calculated by the ONT, which schedule may include transmission times using the assigned secondary wavelength. In this case, the assigned secondary wavelength will be scheduled using a relatively smaller or no quiet window. This scheduling may be determined in part by the service or services used by the ONU.Type: GrantFiled: November 20, 2017Date of Patent: August 4, 2020Assignee: NOKIA OF AMERICA CORPORATIONInventors: William B. Weeber, Timothy J. Williams
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Publication number: 20190356389Abstract: A method for a first optical transceiver to range one of a plurality of second optical transceivers. The method my include broadcasting a first ranging grant, determining whether a runt response is received in a quiet window, changing one of the desired delay or a timing of the quiet window in response to determining that no runt response was received, repeating the broadcasting and the determining in response to determining that no runt response was received, identifying one of the unranged second optical transceivers in response to determining that a runt response was received, and establishing a ranged state with the identified unranged second optical transceiver. The first ranging grant including a delay request indicating a first delay before unranged second optical receivers respond. The quiet window is a time when no responses are expected from the second optical transceivers.Type: ApplicationFiled: May 17, 2018Publication date: November 21, 2019Applicant: Nokia Solutions and Networks OYInventors: William B. WEEBER, Roy TEBBE
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Publication number: 20180145757Abstract: A method and apparatus for latency control in an optical network. A management node such as an OLT in a PON sends a discovery message intending to prompt joining network nodes such as ONUs to send a response on a first wavelength during a quiet window established for this purpose. When a response is received, a secondary upstream-transmission wavelength is assigned to the ONU. When the ONU sends data upstream according to a schedule calculated by the ONT, which schedule may include transmission times using the assigned secondary wavelength. In this case, the assigned secondary wavelength will be scheduled using a relatively smaller or no quiet window. This scheduling may be determined in part by the service or services used by the ONU.Type: ApplicationFiled: November 20, 2017Publication date: May 24, 2018Applicant: Alcatel-Lucent USA Inc.Inventors: William B. Weeber, Timothy J. Williams
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Publication number: 20100061729Abstract: A system and method for optical transmission that provides an efficient manner of increasing transmission capacity, especially in the downstream direction, with minimal changes to existing components. An optical network node includes an optical transmitter, a plurality of optical media access controllers, and a bit interleaver for interleaving the output of each of the plurality of optical media access controllers into a single bit stream and providing the bit stream to the optical transmitter. In operation, the optical network node, which may be an OLT, thereby is capable of transmitting at a rate equal to the sum of the output rates of the individual media access controllers. A corresponding deinterleaver in a receiving node, such as an ONT, separates the interleaved bit stream into its constituent bit streams, one or more of which may be selected for use in the receiving device.Type: ApplicationFiled: September 2, 2009Publication date: March 11, 2010Inventor: William B. Weeber
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Patent number: 6449292Abstract: An implementation of a synchronous state machine, responsive to a time division multiplexed external input signal having plural time slots in a repetitive structure, has all of its flip-flop outputs hooked up to a state memory so that the state produced by each time slot is stored until that time slot is again repeated at the external input, at which point the stored state is recalled from memory for being input along with the incoming time slot data; in this way the hardware is shared between time slots. A substitution element is disclosed having a flip-flop with its output routed to memory and for providing a memory output as its output. A design methodology is taught whereby a state memory and a substitution element is substituted for each flip-flop in a synchronous state machine implemented for one time slot of a repeating pattern of time slots.Type: GrantFiled: August 28, 1997Date of Patent: September 10, 2002Assignee: AlcatelInventor: William B. Weeber
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Patent number: 5872780Abstract: An internal signal within a SONET element has a transport format having overhead and payload mapped in a manner similar to the Synchronous Optical Network standard mapping, except having selected overhead bytes defined differently, including a byte used for communicating odd parity calculated over an odd number of bytes of a frame of the transport format to determine correct or incorrect parity, selected bytes used for inter-module automatic protection switching, and a pointer having a selected fixed value, along with an adjusted virtual tributary pointer in a virtual tributary mode.Type: GrantFiled: May 21, 1992Date of Patent: February 16, 1999Assignee: Alcatel Network Systems, Inc.Inventors: Sahabettin C. Demiray, Dale L. Krisher, William B. Weeber
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Patent number: 5809032Abstract: A receive SONET line interface includes an elastic store which receives and stores incoming signals from a pointer tracking circuit and retrieves stored signals for providing to a pointer generating circuit wherein, for both the pointer tracking and pointer generating circuits, separate state memories are provided for keeping track of the state of previous state pointer tracking and generating signals in time slots of repetitive frames of an incoming SONET signal.Type: GrantFiled: January 15, 1997Date of Patent: September 15, 1998Assignee: Alcatel Network Systems, Inc.Inventors: William B. Weeber, Ertugrul Baydar, Sahabettin C. Demiray
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Patent number: 5717693Abstract: A SONET network element receives incoming SONET signals with a receive line interface (2) which stores the incoming data in an elastic store at the recovered line rate while a local interface reads the stored data at the local network element rate, which may vary slightly from the recovered line rate, and which adjusts the received pointers according to the difference between the line and local rates or phase, allowing the payload data to "float" with respect to the boundaries of frames containing both payload data and overhead with pointers; an elastic store monitor performs the comparison between the receive payload rate and the local clock by comparing write addresses at the recovered line rate and read addresses at the local network element rate by a subtraction process which causes pointer adjustments to be made in response to the subtracted difference exceeding selected memory limits. A process for carrying out VT/TU and/or STS/STM pointer interpretation and generation is shown.Type: GrantFiled: January 3, 1994Date of Patent: February 10, 1998Assignee: Alcatel Network Systems, Inc.Inventors: Ertugrul Baydar, William B. Weeber
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Patent number: 5715248Abstract: A SONET formatter circuit (10) receives a parallel STS-1** TX signal (19) from a highspeed interface module. The STS-1** TX signal (19), which contains a floating VT group payload, is demultiplexed into seven parallel VT groups (33). These seven parallel VT groups (33) are converted to serial by a parallel to serial converter (34) and transmitted serially to lowspeed interface modules as DEMUX direction VT group data signals (42, 43). The SONET formatter circuit (10) also receives serial MUX direction VT group data signals (68, 69) from lowspeed interface modules. These serial VT group data signals (68, 69) are converted to seven parallel VT groups (89) by a serial to parallel converter (64). These seven parallel VT groups (89) are multiplexed with overhead data (84) into a parallel STS-1** RX signal (50) which is transmitted to a highspeed interface module. To maintain continuous VT group frame transmissions, a VT group clock generation circuit (72) is required.Type: GrantFiled: May 21, 1992Date of Patent: February 3, 1998Assignee: Alcatel Network Systems, Inc.Inventors: Hugh Andrew Lagle, III, Duane Richard Remein, James Michael Preston, William Christian Staton, William B. Weeber
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Patent number: 5706299Abstract: Read and write addresses on the local and line sides of a SONET elastic store are compared at least twice in order to determine any ambiguity in the comparison and, if so determined, foregoing any pointer adjustments that would otherwise have been made.Type: GrantFiled: May 21, 1992Date of Patent: January 6, 1998Assignee: Alcatel Network Systems, Inc.Inventors: Ertugrul Baydar, William B. Weeber
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Patent number: 5528530Abstract: A desynchronizer (20) for desynchronizing data stored within synchronous payload envelopes of a synchronous communication protocol such as SONET (Synchronous Optical Network), provides for smoothing the periodically discontinuous clock signal associated with that data after the synchronous communication protocol overhead has been removed. The desynchronizer accommodates for shifts in the position of the payload envelope and hence, the data within the synchronous communication frame as well as adjustments within the data itself due to asynchronous bit stuff information.Type: GrantFiled: January 12, 1995Date of Patent: June 18, 1996Assignee: Alcatel Network Systems, Inc.Inventors: William E. Powell, William B. Weeber, Manal E. Afify
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Patent number: 5461380Abstract: A bit resolution phase detector can be realized for a parallel elastic store by comparing a write bit clock and a read bit clock to determine when stuff bits are required; upon detection of phase alignment between the write and read clocks, the phase detector will output a signal which will enable the insertion of a data bit into the stuff opportunity bit and cause the write clock to lag the read clock by one bit period.Type: GrantFiled: January 18, 1994Date of Patent: October 24, 1995Assignee: Alcatel Network Systems, Inc.Inventors: Richard W. Peters, William B. Weeber
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Patent number: 5404380Abstract: A desynchronizer for processing pointer movements and stuff bit information associated with payload data transmitted within a synchronous digital communication network. The desynchronizer includes a payload extractor (58) for removing payload data and storing it in an elastic store (32). The extractor also removes the pointer and stuff bit information which is passed through a digital low pass bit leaking module (36). The difference between the write and read addresses of the elastic store is determined (modules 48 and 50) and algebraically combined with the output of the bit leaking module (36) so as to provide the necessary data for adjusting the instantaneous frequency of a variable controlled oscillator (44) that generates the timing base for the read clock for reading the payload from the elastic store in a manner that minimizes jitter.Type: GrantFiled: August 25, 1992Date of Patent: April 4, 1995Assignee: Alcatel Network Systems, Inc.Inventors: William E. Powell, William B. Weeber
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Patent number: 5402452Abstract: A desynchronizer (20) for desynchronizing data stored within synchronous payload envelopes of a synchronous communication protocol such as SONET (Synchronous Optical Network), provides for smoothing the periodically discontinuous clock signal associated with that data after the synchronous communication protocol overhead has been removed. The desynchronizer accommodates for shifts in the position of the payload envelope and hence, the data within the synchronous communication frame as well as adjustments within the data itself due to asynchronous bit stuff information.Type: GrantFiled: August 25, 1992Date of Patent: March 28, 1995Assignee: Alcatel Network Systems, Inc.Inventors: William E. Powell, William B. Weeber, Manal E. Afify
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Patent number: 5285206Abstract: A bit resolution phase detector can be realized for a parallel elastic store by comparing a write bit clock and a read bit clock to determine when stuff bits are required; upon detection of phase alignment between the write and read clocks, the phase detector will output a signal which will enable the insertion of a data bit into the stuff opportunity bit and cause the write clock to lag the read clock by one bit period.Type: GrantFiled: August 25, 1992Date of Patent: February 8, 1994Assignee: Alcatel Network Systems, Inc.Inventors: Richard W. Peters, William B. Weeber
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Patent number: 5210762Abstract: A SONET pointer interpretation in system which an Alarm Indication Signal (AIS) of a first type is interpreted as a subset of Loss of Pointer (LOP) of a first type. Specific events are defined for entering an AIS type 1 state and for exiting this state. Specific events are also defined for entering an LOP type 1 state and for exiting this state. Finally, a truth table is defined for mapping these states into a valid pointer (NORM) state, an AIS of a second type state and an LOP of a second type state.Type: GrantFiled: October 2, 1991Date of Patent: May 11, 1993Assignee: Alcatel Network Systems, Inc.Inventors: William B. Weeber, Dale L. Krisher
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Patent number: 5200982Abstract: An in-line piece-wise linear desynchronizer eliminates the need for very low bandwidth analog, phase lock loops to smooth phase jumps caused by pointer changes such as those associated with a DS-1 signal mapped into a SONET VT 1.5 payload. The desynchronizer comprises a digital elastic store position detection circuit, a digital frame induced jitter filter, a digital leak rate filter, and a digital frequency synthesizer (VCO). The magnitude of the jitter can be reduced to any level by adjusting the digital VCO resolution and digital leak rate filter time constant. The desynchronizer produces a digitally synthesized output clock which can then be coupled to an analog/digital phase lock loop for smoothing high frequency jitter in the synthesized output clock, thereby providing an in-line interface function.Type: GrantFiled: October 2, 1991Date of Patent: April 6, 1993Assignee: Alcatel Network Systems, Inc.Inventor: William B. Weeber
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Patent number: 5185736Abstract: A synchronous optical transmission system for interfacing SONET formatted channels to lower speed channels in either a SONET format or otherwise. The transmission system incorporates a fiber transmission system, terminal multiplexers and add/drop multiplexers that in turn incorporate a plurality of features, such as parallel scrambling circuitry, frame synchronization circuitry and the like.Type: GrantFiled: May 12, 1989Date of Patent: February 9, 1993Assignee: Alcatel NA Network Systems Corp.Inventors: Raymond E. Tyrrell, O. Lamar Bishop, William E. Powell, Dale L. Krisher, William H. Stephenson, M. Rodney Briscoe, Hal A. Thorne, Claude M. Hurlocker, V. Paul Runyon, Timothy J. Williams, Joseph E. Sutherland, William B. Weeber, Michael J. Gingell, Kenneth J. Stoia, William J. Fox, Jeffrey P. Jones, Richard M. Czerwiec, Ertugrul Baydar, Heinrich T. Sonnenberg, Richard Peters, Gus C. Sanders, Richard J. Sanders, Jr., Francis G. Noser, Joseph L. Smith, Jak Yaemsiri, Camille A. Abu-Saba, Patrick M. Farrell, Wenkwei Rou, Victor W. Wilkerson, Mohammad S. Arani, Stephen C. Dunning, Keith Bernhardt, Dana Merrill, Michael Sutton