Patents by Inventor William Bernier

William Bernier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080009101
    Abstract: Disclosed is a method of forming an integrated circuit structure that forms lead-free connectors on a device, surrounds the lead-free connectors with a compressible film, connects the device to a carrier (the lead-free connectors electrically connect the device to the carrier), and fills the gaps between the carrier and the device with an insulating underfill.
    Type: Application
    Filed: September 20, 2007
    Publication date: January 10, 2008
    Inventors: William Bernier, Tien-Jen Cheng, Marie Cole, David Eichstadt, Mukta Farooq, John Fitzsimmons, Lewis Goldmann, John Knickerbocker, Tasha Lopez, David Welsh
  • Publication number: 20080000080
    Abstract: A method of forming compliant electrical contacts includes patterning a conductive layer into an array of compliant members. The array of compliant members is then positioned to be in contact with electrical connection pads on an integrated circuit wafer and the compliant members are joined to the pads. Then, the supporting layer that supported the compliant members is removed to leave the compliant members connected to the pads.
    Type: Application
    Filed: September 17, 2007
    Publication date: January 3, 2008
    Inventors: William Bernier, David Eichstadt, Mukta Farooq, John Knickerbocker
  • Publication number: 20070084629
    Abstract: Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.
    Type: Application
    Filed: October 5, 2006
    Publication date: April 19, 2007
    Inventors: William Bernier, Marie Cole, Mukta Farooq, John Knickerbocker, Tasha Lopez, Roger Quon, David Welsh
  • Publication number: 20060172565
    Abstract: A method of forming compliant electrical contacts includes patterning a conductive layer into an array of compliant members. The array of compliant members is then positioned to be in contact with electrical connection pads on an integrated circuit wafer and the compliant members are joined to the pads. Then, the supporting layer that supported the compliant members is removed to leave the compliant members connected to the pads.
    Type: Application
    Filed: February 3, 2005
    Publication date: August 3, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William Bernier, David Eichstadt, Mukta Farooq, John Knickerbocker
  • Publication number: 20060043608
    Abstract: Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.
    Type: Application
    Filed: August 31, 2004
    Publication date: March 2, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William Bernier, Marie Cole, Mukta Farooq, John Knickerbocker, Tasha Lopez, Roger Quon, David Welsh
  • Publication number: 20060040567
    Abstract: Disclosed is a method of forming an integrated circuit structure that forms lead-free connectors on a device, surrounds the lead-free connectors with a compressible film, connects the device to a carrier (the lead-free connectors electrically connect the device to the carrier), and fills the gaps between the carrier and the device with an insulating underfill.
    Type: Application
    Filed: August 20, 2004
    Publication date: February 23, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William Bernier, Tien-Jen Cheng, Marie Cole, David Eichstadt, Mukta Farooq, John Fitzsimmons, Lewis Goldmann, John Knickerbocker, Tasha Lopez, David Welsh
  • Publication number: 20050224973
    Abstract: A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.
    Type: Application
    Filed: June 8, 2005
    Publication date: October 13, 2005
    Inventors: William Bernier, Charles Carey, Eberhard Gramatzki, Thomas Homa, Eric Johnson, Pierre Langevin, Irving Memis, Son Tran, Robert White