Patents by Inventor William Bryan Barnes

William Bryan Barnes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6362991
    Abstract: A miss detector for a content addressable memory has plural input lines connected across points with the memory output lines. The detector input lines are disposed in pairs of true and false lines, and gating circuitry gates together the true and false pairs to provide a miss error message.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: March 26, 2002
    Assignee: STMicroelectronics Limited
    Inventor: William Bryan Barnes
  • Patent number: 6362680
    Abstract: An output circuit which can minimize the delay in combining two clocks comprises a multiplexer with a flip flop connected to one input and a clocked latch connected to the other. The clocked latch is transparent during one clocking state so that changes to its input appear directly at its output.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: March 26, 2002
    Assignee: STMicroelectronics Limited
    Inventor: William Bryan Barnes
  • Patent number: 6353365
    Abstract: An integrated current reference circuit uses two current mirror circuits, in which one of the transistors of one of the current mirrors has a back gate connection to the power rail, the drain-source path being connected to the power rail via a voltage offset element.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: March 5, 2002
    Assignee: STMicroelectronics Limited
    Inventor: William Bryan Barnes
  • Patent number: 6194956
    Abstract: A current mirror has an input node for receiving an input current and an output node for providing an output current. First, second and third transistors are provided with each transistor having first and second current path terminals and a control terminal. The control terminals of the first and second transistors are connected to each other. The first current path terminal of the first transistor and one of the current path terminals of the second transistor are connected to a power supply. The control terminal of the third transistor is connected to the input node. One of the first and second current path terminals of the third transistor are connected to the output node and the other of the first and second current path terminals of the third transistor are connected to the other of the first and second current path terminals of the second transistor. A resistive element is arranged between the input node and the second current path terminal of the first transistor.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: February 27, 2001
    Assignee: STMicroelectronics Limited
    Inventor: William Bryan Barnes
  • Patent number: 6163468
    Abstract: A start-up circuit applies a start-up current to a current generator. The start-up circuit includes an application circuit for applying the start-up current to the current generator and an ensuring circuit ensuring that the current generator is in a predetermined stable state before the start-up current is applied thereto. The ensuring circuit prevents a flow of current in the current generator prior to application of the start-up current so that the stable state is one in which current is not conducting.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: December 19, 2000
    Assignee: STMicroelectronics Limited
    Inventor: William Bryan Barnes