Patents by Inventor William C. Anderson
William C. Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030089621Abstract: A drive head for a bolt, fastener, coupling, nut or other driveable head made from a less malleable metal such as a powder metal nickel alloy. The drive head has an upper drive portion having at least six convex corners spaced around the outer periphery thereof, each corner terminating in an edge. The drive head also has a lower flange portion adjacent to the drive portion and having an edge extending radially outwardly to at least the edge of each corner. The drive portion and the flange portion of the drive head is formed by subjecting a blank having a generally circular head to electrochemical machining (ECM). A tool is also provided for the ECM method to form the drive portion and flange portion of the drive head.Type: ApplicationFiled: November 6, 2002Publication date: May 15, 2003Inventors: William C. Anderson, Edward I. Stamm, Vicky S. Budinger, Terry L. Lievestro
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Patent number: 6526562Abstract: A method for developing an integrated circuit chip design includes the steps of developing an architecture specification defining the functions of the chip, developing a microarchitecture specification based on the architecture specification, developing a functional and structural model of the chip based on the microarchitecture specification, designing software tools for use with the chip based on the architecture specification, and designing chip verification tools based on the microarchitecture specification. The activities associated with chip development are divided into phases which may be performed concurrently. The result of the development is an RTL model of the chip which can be utilized in implementation of products without comprising proprietary circuit, layout and fabrication process information of the entity that is implementing the products.Type: GrantFiled: May 10, 2000Date of Patent: February 25, 2003Assignee: Analog Devices, Inc.Inventors: Elie Haddad, James Monaco, Thomas Tomazin, William C. Anderson
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Publication number: 20020144089Abstract: In an embodiment, a pipelined processor includes a future file for storing updated data address values generated by a data address generator (DAG). These updated values may be provided to the DAG for subsequent address calculation operations.Type: ApplicationFiled: March 28, 2001Publication date: October 3, 2002Inventors: William C. Anderson, Ryo Inoue
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Patent number: 6446181Abstract: An apparatus having a core processor and a memory system is disclosed. The core processor includes at least one data port. The memory system is connected in such a way as to provide substantially simultaneous data accesses through the data port. The memory system can be made user configurable to provide appropriate memory model.Type: GrantFiled: March 31, 2000Date of Patent: September 3, 2002Assignees: Intel Corporation, Analog Devices, Inc.Inventors: Hebbalalu S. Ramagopal, David B. Witt, Michael Allen, Moinul Syed, Ravi Kolagotla, Lawrence A. Booth, Jr., William C. Anderson
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Publication number: 20020087853Abstract: In an embodiment, a processor may be operable in a user mode and in a supervisor mode. The processor may initialize hardware loops in the user mode by loading a top instruction address in a LOOP_TOP register and a bottom instruction address in a LOOP_BOT register. A user program could conceivably gain access to the supervisor mode by loading the target address of an event service routine, in the supervisor instruction address space, in the LOOP_BOT register and an address in the user instruction address space in the LOOP_TOP register. If the event occurred in the supervisor mode, the program flow could branch to the address in the LOOP_TOP register, giving the user program control in the supervisor mode. To avoid this potential security hazard, the processor may disable hardware loop operations when the processor exits the user mode.Type: ApplicationFiled: December 28, 2000Publication date: July 4, 2002Inventors: Ravi P. Singh, Thomas Tomazin, Charles P. Roth, William C. Anderson
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Patent number: 6370752Abstract: A method for repositioning or repairing holes in metal substrates such as metal components used in jet engines and the like. The hole to be repositioned or repaired is enlarged and a recess is formed at each end of the enlarged hole. A deformable metal insert is then inserted within the enlarged hole and then subjected to physical forces so as to cause it to deform and frictionally engage the walls of the recesses and the enlarged hole so that the insert becomes axially fixed therein. A new, repositioned hole can then be formed in the fixed insert that extends completely therethrough.Type: GrantFiled: April 21, 2000Date of Patent: April 16, 2002Assignee: General Electric CompanyInventors: William C. Anderson, Dewey D. Dunkman, Gerald R. Geverdt, Ronald D. Stapperfenne
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Patent number: 6311875Abstract: A pressurized tank dispenser assembly generally includes an extractor valve and a relief valve component mounted on a common fitting which may be held to a tank by a securement ring. The extractor valve permits pressurizing the tank and dispensing liquid by the attachment of a coupler thereon without the need for tools, while the relief valve component includes both vacuum relief and overpressure relief valves. The fitting is attached to the tank by the annular securement ring, whereby only a single opening through the tank is necessary to perform all operating functions of the tank.Type: GrantFiled: April 5, 2000Date of Patent: November 6, 2001Assignee: Snyder Industries, Inc.Inventors: William C. Anderson, Bryan J. Gran, Todd Bolzer
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Patent number: 5727229Abstract: A method and apparatus for moving data in a parallel processing system (3). In one embodiment, a single instruction accesses one significant bit of information from each element in processing element array (80) and combines these bits into one designated element in global register file (50). The ordering of bits in vectors of global register file (50) associates each bit with an element of processing element array (80). Another single instruction distinguishes significant bit information from a particular vector in global register file (50) and transfers that information to an associated bit in storage circuits associated with each element in processing element array (80).Type: GrantFiled: February 5, 1996Date of Patent: March 10, 1998Assignee: Motorola, Inc.Inventors: Larry Yiucham Kan, William C. Anderson, Chuan-Chang Hung, Meltin Bell
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Patent number: 5619711Abstract: A data processing system 10 comprises an arbitrary precision number C++ class program code 18, which incorporates arbitrary precision arithmetic. The arbitrary precision number program code 18 resides in a client program 14 and never lose bits of precision by maintaining an internal data structure 16, which holds the data, and by manipulating that data by operators and methods which the program code 18 defines. The program code 18, which is embedded in a client program 14, comprises a method that uses "lazy" storage allocation for transparent data management for the arbitrary precision number in the internal data array 22, a "lazy" arithmetic evaluation for avoiding more costly arithmetic operations, a width method for an optimized significant bit calculation, and a method for efficient determining the number of trailing zeros method for more efficient IEEE floating point math emulation operations.Type: GrantFiled: June 29, 1994Date of Patent: April 8, 1997Assignee: Motorola, Inc.Inventor: William C. Anderson
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Patent number: 5276635Abstract: A carry look-ahead (CLA) adder accommodates a late carry-in from a low-order external 32-bit adder to enable a 96-bit addition to be performed in the same time in which the CLA adder (60) performs a 64-bit addition. Within each adder slice, intermediate group propagate and group generate terms are generated for each bit location in the adder (60), while the adder simultaneously generates an n-bit group propagate and group generate term. The intermediate group propagate and group generate terms are combined with carry-in terms to generate, in parallel, local carry-out terms within each adder slice. The local carry-out terms and intermediate group propagate and group generate terms are used to form a carry chain path which allows the adder to delay the carry-in of an external carry term.Type: GrantFiled: June 1, 1993Date of Patent: January 4, 1994Assignee: Motorola, Inc.Inventors: Ajay Naini, William C. Anderson
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Patent number: 5268995Abstract: A method for performing graphics Z-compare and pixel merge operations, for use in a Z-buffering system to remove hidden surfaces when displaying a three-dimensional image, is provided. The data processing system includes a main memory for storing data and instructions, and a graphics execution unit for executing graphics instructions. The graphics execution units are connected to an instruction sequencer, which provides instructions and data operands to the execution units, via a communications bus. In response to receiving Z-compare and pixel merge instructions, the graphics execution unit compares one or more Z-axis coordinates within a first data operand to one or more Z-axis coordinates in a corresponding bit-field position within a second data operand to determine a relative Z-axis position of each of the one or more pixels associated with the one or more Z-axis coordinates.Type: GrantFiled: November 21, 1990Date of Patent: December 7, 1993Assignee: Motorola, Inc.Inventors: Keith E. Diefendorff, William C. Anderson
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Patent number: 5265043Abstract: A Wallace tree multiplier array (40) performs multiply operations using operands received via a data path (42) having a predetermined height. Rows of carry save adders (CSAs 15'-19") add sets of partial products to generate sets of intermediate summands, which are recursively added to generate a set of final summands. A first group of CSAs form a column which is placed along an axis parallel to the data path (42), and are used to compute a more significant number of bits of each of the summands. The column height of the first group of CSAs is equal to and aligned with the height of the data path (42). A second group of CSAs are placed along an axis perpendicular to the column formed by the first group of CSAs, thereby minimizing the dimension of the multiplier along the data path. The second group of CSAs compute a less significant number of bits of the summands.Type: GrantFiled: January 27, 1993Date of Patent: November 23, 1993Assignee: Motorola, Inc.Inventors: Ajay Naini, William C. Anderson, Lisa J. Craft
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Patent number: 5220525Abstract: A recorded iterative multiplier (20) performs an unsigned multiplication operation quickly and with a minimal amount of added circuitry. Multiplier (20) includes a Modified Booth recoder (34) and a plurality of multiplexors (24, 26, 28, 30, and 32) to provide a plurality of partial products. An additional partial product typically generated during a first iteration of the multiplication operation is provided to a multiplexor (44) and a remaining portion of partial products are provided to a summation tree (40) having a symmetrical circuit layout. [Multiplexor (44) stores the additional partial product until summation tree (40) has processed the remaining partial products to provide a first sum.] When summation tree (40) has processed the remaining partial products to provide a first sum, multiplexor (44) provides the additional partial product to a carry save adder (42). The first sum is added to the additional partial product in [a carry-save] adder (42) to provide a first portion of a product.Type: GrantFiled: November 4, 1991Date of Patent: June 15, 1993Assignee: Motorola, Inc.Inventors: William C. Anderson, Ajay Naini
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Patent number: 4514077Abstract: A magnetic toner developing device for developing images on a photoconductive sheet. The device includes a magnetic developer roller brush for applying a single component toner to the sheet. An electrically isolated guide plate extends beneath the developer roller brush in close proximity thereto and supports the sheet in its travel through a development zone formed between the developer roller brush and the guide plate. The guide plate is electrically isolated from a support frame to eliminate electrostatic clamping of the sheet to the guide plate.Type: GrantFiled: February 18, 1983Date of Patent: April 30, 1985Assignee: AM International, Inc.Inventors: Virgil W. Westdale, James L. Hanrahan, William C. Anderson
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Patent number: 4500060Abstract: A mounting pedestal for supporting a computer terminal display device or the like is disclosed. The mounting pedestal provides for 360.degree. rotation of the support platform while permitting only limited front to rear tilting of the support platform. A base member includes an annular depression in the form of a segment of a sphere in its upper surface into which a complimentary spherical segment on the underside of the tilt platform rests to provide for 360.degree. rotation of the tilt platform with respect to the stationary base. Tilting in only a front to rear mode is controlled by a pair of laterally extending cylindrical segments on the underside of the tilt platform.Type: GrantFiled: June 11, 1982Date of Patent: February 19, 1985Assignee: Westinghouse Electric Corp.Inventors: William C. Anderson, Bruce K. Boundy, Raoul J. P. Schoumaker
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Patent number: 4471574Abstract: A shutter operating system for a shutter hinged along a horizontal axis of an opening such as a fenestration in a wall includes cables attached to the free end of the shutter which are threaded through passages in the wall above the fenestration and to a horizontal counterweight member operating multiple cable pull points evenly through use of vertical equalizer brackets and restraint roller assemblies, assisted in operation by a hydraulic or pneumatic piston assembly, which opens and closes the shutter. The shutter operating system can also be operated manually without the assistance of the hydraulic or pneumatic piston assembly.Type: GrantFiled: March 18, 1982Date of Patent: September 18, 1984Inventors: Donald L. Strange-Boston, William C. Anderson
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Patent number: 4424654Abstract: A panel rigidizer for maintaining linear alignment of a plurality of space dividing wall panels interconnected by cylindrical support posts. The panel rigidizer spans the interconnection of a pair of wall panels and associated connecting post and includes a pair of linearly aligned leg portions which are secured to the top edge of the wall panels and a central hub portion which overlies the cylindrical post and receives therethrough the post cap.Type: GrantFiled: August 11, 1981Date of Patent: January 10, 1984Assignee: Westinghouse Electric Corp.Inventors: William C. Anderson, Richard H. Wolters
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Patent number: 4406379Abstract: A cable manager for concealing and controlling electrical and telephone cables in an office environment is disclosed. The cable manager includes a base housing member and a hinged top closure member. A plurality of leaf springs releasably retain the top closure in either the open or closed position and hidden access to the interior of the closed cable manager is provided along its entire length.Type: GrantFiled: June 11, 1982Date of Patent: September 27, 1983Assignee: Westinghouse Electric Corp.Inventors: William C. Anderson, Raoul J. P. Schoumaker
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Patent number: D268622Type: GrantFiled: December 4, 1980Date of Patent: April 12, 1983Assignee: Westinghouse Electric Corp.Inventors: Richard H. Wolters, William C. Anderson, Charles R. Tyke, Charles P. Schreiner
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Patent number: D296387Type: GrantFiled: September 18, 1985Date of Patent: June 28, 1988Inventors: William C. Anderson, Michael Jensen