Abstract: In one embodiment, an integrated circuit which uses one or more re-useable modules may use a signature generated by a duplicate state machine or an unmodified state machine to select, control, or otherwise affect a resource on the integrated circuit, where affecting the resource was not part of the original design and state diagram of the unmodified state machine. In one embodiment, a method and apparatus is provided for dynamically reconfiguring a plurality of test circuits in re-useable modules on an IC without modifying the controller state machine in the re-usable module.

Abstract: In one embodiment, an integrated circuit (10) which uses one or more re-useable modules (14, 16) may use a signature generated by a duplicate state machine (26, 28) or an unmodified state machine (20, 22) to select, control, or otherwise affect a resource on the integrated circuit (10), where affecting the resource was not part of the original design and state diagram of the unmodified state machine (20, 22). In one embodiment, a method and apparatus is provided for dynamically reconfiguring a plurality of test circuits in re-useable modules (14, 16) on an IC (10) without modifying the controller state machine (20, 22) in the re-usable module (14, 16).

Abstract: The present invention relates generally to data processors and more specifically, to data processors having an adaptive priority controller. One embodiment relates to a method for prioritizing requests in a data processor (12) having a bus interface unit (32). The method includes receiving a first request from a first bus requesting resource (e.g. 30) and a second request from a second bus requesting resource (e.g. 28), and using a threshold corresponding to the first or second bus requesting resource to prioritize the first and second requests. The first and second bus requesting resources may be a push buffer (28) for a cache, a write buffer (30), or an instruction prefetch buffer (24). According to one embodiment, the bus interface unit (32) includes a priority controller (34) that receives the first and second requests, assigns the priority, and stores the threshold in a threshold register (66).