Patents by Inventor William C. Diss

William C. Diss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for estimating fault coverage
    Patent number: 4937765
    Abstract: Method and apparatus estimates fault coverage of a set of test vectors to be applied to a circuit containing sequential elements. The apparatus permits sequential elements to be represented as functional blocks rather than combinational circuits with feedback. This is accomplished by taking into account the external state of the sequential element during circuit simulation. The apparatus also takes into account high impedance as possible inputs and outputs.
    Type: Grant
    Filed: July 29, 1988
    Date of Patent: June 26, 1990
    Assignee: Mentor Graphics Corporation
    Inventors: Paul A. Shupe, Michael E. Ausec, William C. Berg, William C. Diss