Abstract: A bare semiconductor circuit die carrier is provided for use in the test of semiconductor circuits, the carrier, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to form a flexible membrane that spans the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible membrane with particles deposited on the die contact pads; a fence upstanding from the membrane and sized to receive a test die; a top cap that rests upon the die when the die is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the die disposed therebetween.

Abstract: Methods for the production of insulated, conductive through-features in conductive core materials for electronics packaging are disclosed. Invention methods employ protective mask technology in order to facilitate the selective removal of material from planar conductive core material that has been encapsulated in electrically insulated materials. By filling the cavity in the conductive core material with an electrically insulated material, the through-feature is electrically isolated from the remainder of the core material. In this manner, a conductive through-feature that completely transverses the core of the substrate board is created. Also provided are planar substrates for multilayer printed circuit boards, or chip carriers, comprising the conductive through-features produced by invention methods.

Abstract: A bare semiconductor circuit die carrier is provided for use in the test of semiconductor circuits, the carrier, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to form a flexible membrane that spans the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible membrane with particles deposited on the die contact pads; a fence upstanding from the membrane and sized to receive a test die; a top cap that rests upon the die when the die is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the die disposed therebetween.

Abstract: A thin MCM packaging structure and technique is provided in which a thin film decal interconnect circuit is fabricated on a thin aluminum wafer. The thin-film decal interconnect employs Au metallurgy for bonding and comprises a bond pad/ground plane layer, topside pads, and one or more routing layers. The top routing layer also acts as the pad layer along the edge of the interconnect structure. The underside of the decal interconnect structure is provided with metal pads for attachment to conventional aluminum or gold I/O pads on one surface of the integrated circuit die. A thermosonic bonding system is used to bond the die pads to the pads. The aluminum wafer is selectively removed forming one or more cavities to hold one or more die to be mounted on the MCM structure. The die are oriented with their pads in contact with contact pads on the thin-film decal interconnect to which they are bonded and the cavities are filled with a liquid encapsulant and cured.

Abstract: A thin MCM packaging structure and technique is provided in which a thin film decal interconnect circuit is fabricated on a thin aluminum wafer. The thin-film decal interconnect employs Au metallurgy for bonding and comprises a bond pad/ground plane layer, topside pads, and one or more routing layers. The top routing layer also acts as the pad layer along the edge of the interconnect structure. The underside of the decal interconnect structure is provided with metal pads for attachment to conventional aluminum or gold I/O pads on one surface of the integrated circuit die. A thermosonic bonding system is used to bond the die pads to the pads. The aluminum wafer is selectively removed forming one or more cavities to hold one or more die to be mounted on the MCM structure. The die are oriented with their pads in contact with contact pads on the thin-film decal interconnect to which they are bonded and the cavities are filled with a liquid encapsulant and cured.

Abstract: An interconnect structure formed of a flexible, multilayer dielectric material such as polyimide, having a support ring, connection points on the section inside the support ring for connecting one or more semiconductor chips, and connection points outside the support ring for connecting to a circuit board. Alignment templates are disclosed which align the semiconductor chip with the connection points.

Abstract: A method for testing semiconductor chips using a test package having electrical contacts which have in them metallized particles which pierce the surface of the pads of a semiconductor chip, the chips being mounted on a flexible substrate which can deflect to increase the uniformity of the level to which the metallized particles pierce the surface of the pads of the semiconductor chip. If the chip tests as "good", pressure can be applied to increase the piercing depth, thereby allowing the test package to be used as a permanent package.

Abstract: A thin MCM packaging structure and technique is provided in which a thin film decal interconnect circuit is fabricated on a thin aluminum wafer. The thin-film decal interconnect employs Au metallurgy for bonding and comprises a bond pad/ground plane layer, topside pads, and one or more routing layers. The top routing layer also acts as the pad layer along the edge of the interconnect structure. The underside of the decal interconnect structure is provided with metal pads for attachment to conventional aluminum or gold I/O pads on one surface of the integrated circuit die. A thermosonic bonding system is used to bond the die pads to the pads. The aluminum wafer is selectively removed forming one or more cavities to hold one or more die to be mounted on the MCM structure. The die are oriented with their pads in contact with contact pads on the thin-film decal interconnect to which they are bonded and the cavities are filled with a liquid encapsulant and cured.

Abstract: An integrated circuit carrier comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to span the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible polymer dielectric with particles deposited on the die contact pads; a polymer dielectric fence upstanding from the membrane and sized to receive an integrated circuit; a top cap that rests upon the integrated circuit when the integrated circuit is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the integrated circuit disposed therebetween.