Patents by Inventor William Cabreros

William Cabreros has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9117810
    Abstract: A leadless semiconductor package includes a package body on a leadframe that includes a die paddle and a plurality of bond pads, none of which extend as far as a lateral face of the body. During manufacture of the package, molding compound is deposited over a face of the leadframe on which the die paddle and bond pads are positioned. After the molding compound is cured, a back side of the leadframe is etched to isolate the die paddle and bond pads, back surfaces of which remain exposed at a back face of the body. During manufacture of the leadframe, a parent substrate is etched to define the die paddle and a plurality of bond pads on one side of the substrate and a plurality of cavities on the opposite face.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: August 25, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: Jerry Tan, William Cabreros
  • Publication number: 20150076675
    Abstract: Embodiments of the present disclosure are directed to leadframe packages with wettable sides and methods of manufacturing same. In one embodiment, the leads of the leadframe packages have recesses with a curved profile formed therein. The recesses are plated with a solder wettable layer of conductive material that enables solder to flow along the surface during surface mounting of the package to a board, such as a PCB.
    Type: Application
    Filed: September 16, 2013
    Publication date: March 19, 2015
    Applicant: STMicroelectronics, Inc.
    Inventors: Rogelio Real, William Cabreros
  • Publication number: 20140377910
    Abstract: A leadless semiconductor package includes a package body on a leadframe that includes a die paddle and a plurality of bond pads, none of which extend as far as a lateral face of the body. During manufacture of the package, molding compound is deposited over a face of the leadframe on which the die paddle and bond pads are positioned. After the molding compound is cured, a back side of the leadframe is etched to isolate the die paddle and bond pads, back surfaces of which remain exposed at a back face of the body. During manufacture of the leadframe, a parent substrate is etched to define the die paddle and a plurality of bond pads on one side of the substrate and a plurality of cavities on the opposite face.
    Type: Application
    Filed: September 5, 2014
    Publication date: December 25, 2014
    Inventors: Jerry Tan, William Cabreros
  • Patent number: 8426254
    Abstract: A leadless semiconductor package includes a package body on a leadframe that includes a die paddle and a plurality of high-aspect-ratio leads, each coupled at a first end to a contact pad of the package, and at a second end to a semiconductor die mounted to the die paddle. During manufacture of the package, molding compound is deposited over a face of the leadframe on which the die paddle and leads are positioned. After the molding compound is cured, a back side of the leadframe is etched to isolate the die paddle and leads, and to thin a portion of each of the leads. Back surfaces of the leads remain exposed at a back face of the body. The thinned portions of the leads are covered with a dielectric. During manufacture of the leadframe, a parent substrate is etched to define the die paddle and a plurality of leads on one side of the substrate and a plurality of cavities on the opposite face.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: April 23, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Jerry Tan, William Cabreros
  • Publication number: 20120168920
    Abstract: A leadless semiconductor package includes a package body on a leadframe that includes a die paddle and a plurality of bond pads, none of which extend as far as a lateral face of the body. During manufacture of the package, molding compound is deposited over a face of the leadframe on which the die paddle and bond pads are positioned. After the molding compound is cured, a back side of the leadframe is etched to isolate the die paddle and bond pads, back surfaces of which remain exposed at a back face of the body. During manufacture of the leadframe, a parent substrate is etched to define the die paddle and a plurality of bond pads on one side of the substrate and a plurality of cavities on the opposite face.
    Type: Application
    Filed: December 30, 2010
    Publication date: July 5, 2012
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Jerry Tan, William Cabreros
  • Publication number: 20120168921
    Abstract: A leadless semiconductor package includes a package body on a leadframe that includes a die paddle and a plurality of high-aspect-ratio leads, each coupled at a first end to a contact pad of the package, and at a second end to a semiconductor die mounted to the die paddle. During manufacture of the package, molding compound is deposited over a face of the leadframe on which the die paddle and leads are positioned. After the molding compound is cured, a back side of the leadframe is etched to isolate the die paddle and leads, and to thin a portion of each of the leads. Back surfaces of the leads remain exposed at a back face of the body. The thinned portions of the leads are covered with a dielectric. During manufacture of the leadframe, a parent substrate is etched to define the die paddle and a plurality of leads on one side of the substrate and a plurality of cavities on the opposite face.
    Type: Application
    Filed: December 30, 2010
    Publication date: July 5, 2012
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Jerry Tan, William Cabreros