Abstract: A Single Instruction Multiple Data processor apparatus for implementing algorithms using sliding window type data is shown. The implementation shifts the elements of a Destination Vector Register (406, 606) either automatically every time the destination register value is read or in response to a specific instruction (800). The shifting of the Destination Vector Register (406, 606) allows each processing element to operate on new data. As the destination vector (406, 606) elements are shifted, a new element is provided to the vector from a Source Vector Register (404, 604).

Abstract: A method and apparatus for performing rounding in a data processor (10). In one embodiment, two instructions are used to implement a procedure for rounding operands of finite but arbitrary precision. A first instruction "rndp" performs a preliminary rounding operation by analyzing bits which are less significant than the rounding point and updating the values of the round (RND) and sticky (STK) status bits (70, 71) in a defined manner. A second instruction "rnd" performs the rounding of the most significant portion of the operand, using the contents of the RND and STK status bits (70, 71) as determined by the one or more iterations of the "rndp" instruction. By appropriate use of these two instructions, and additional add-with-carry operations, an operand of any length may be rounded at an arbitrary point using a data processor (10) with fixed width registers (40) and a fixed width ALU (30).