Abstract: Apparatus for a digital memory system which performs single and double error detection and correction, as well as the detection of faults in the memory storage elements which do not produce errors in the data word stored therein. The data word is encoded in a specialized Hamming SEC/DED code and the apparatus generates syndromes and byte parity bits which are analyzed to detect both the presence and nature of the errors and faults. A parallel correction procedure is followed and the results thereof compared to prevent the erroneous correction of errors.