Patents by Inventor William Clay Choate

William Clay Choate has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7002510
    Abstract: A method and apparatus is disclosed for determining the range between two planes, ownship (10) and target (12). Model data (66) estimating the velocity and position of target (12) is compared to actual flight path data of the target (12) passively received by ownship (10). The model data (66) and actual data is compared, and an error measurement is calculated. The model data is also subject to position and velocity constraints (78 and 82) which penalize unrealistic estimates. The error measurement and penalties are used to create a perturbation model (90) which is added to the model data to generate new model data. When the model data (66) conforms closely to the actual data, a range is computed from the model data (66).
    Type: Grant
    Filed: December 15, 1989
    Date of Patent: February 21, 2006
    Assignee: Raytheon Company
    Inventors: William Clay Choate, Charles Emil Frey, James Anthony Jungmann
  • Patent number: 5870486
    Abstract: A method for inferring precise sensor attitude information in a tracking sensor system begins with storing at a first time a reference image in a memory associated with tracking sensor. Next, the method includes sensing it a second time second image. The sensed image comprises a plurality of sensed feature locations. The method further includes determining the position of the tracking sensor at the second time relative to its position at the first time and then forming a correlation between the sensed feature locations and the predetermined feature locations as a function of the relative position. The method results in an estimation of a tracking sensor pose that is calculated as a function of the correlation. Because the method is primarily computational, implementation requires no new hardware in a tracking sensor system other than that which may be required to provide additional computational capacity.
    Type: Grant
    Filed: December 11, 1991
    Date of Patent: February 9, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: William Clay Choate, Rajendra K. Talluri
  • Patent number: 5647015
    Abstract: A method for inferring precise sensor attitude information in a tracking sensor system begins with storing at a first time a reference image in a memory associated with tracking sensor. Next, the method includes sensing at a second time a second image. The sensed image comprises a plurality of sensed feature locations. The method further includes determining the position of the tracking sensor at the second time relative to its position at the first time and then forming a correlation between the sensed feature locations and the predetermined feature locations as a function of the relative position. The method results in an estimation of a tracking sensor pose that is calculated as a function of the correlation. Because the method is primarily computational, implementation requires no new hardware in a tracking sensor system other than that which may be required to provide additional computational capacity.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 8, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: William Clay Choate, Rajendra K. Talluri
  • Patent number: 4051354
    Abstract: A small programmable memory means such as an electrically programmable logic array is incorporated on the chip of a conventional bit addressable random access memory or other cell addressable array circuit. The array has one or more superfluous rows and/or columns of cells held in reserve. Processing and testing of the chip is conducted in a conventional manner. Chips with faulty cells are corrected by programming the memory means with the cell addresses of the faulty cell locations. Subsequently, the memory means will respond to any of these addresses and, through interaction with either the address decoding logic or input/output logic, cause a reserve cell or the contents thereof to be selected instead of the faulty cell.
    Type: Grant
    Filed: July 3, 1975
    Date of Patent: September 27, 1977
    Assignee: Texas Instruments Incorporated
    Inventor: William Clay Choate
  • Patent number: 4047163
    Abstract: A small programmable memory means such as an electrically programmable logic array is incorporated on the chip of a conventional bit addressable random access memory or other cell addressable array circuit. The array has one or more superfluous rows and/or columns of cells held in reserve. Processing and testing of the chip is conducted in a conventional manner. Chips with faulty cells are corrected by programming the memory means with the cell addresses of the faulty cell locations. Subsequently, the memory means will respond to any of these addresses and, through interaction with input/output logic, cause the data input and/or output to be steered to or from a reserve cell instead of the addressed faulty cell.
    Type: Grant
    Filed: July 3, 1975
    Date of Patent: September 6, 1977
    Assignee: Texas Instruments Incorporated
    Inventors: William Clay Choate, Dileep P. Bhandarkar