Abstract: A test circuit operable to examine both differential outputs and single outputs of a device under test (DUT), the circuit comprises a first circuit having as inputs a first output of the DUT and a first set of independent reference voltages, and an output of the first circuit coupled to a plurality of comparators. The test circuit further comprises a second circuit having as inputs a second output of the DUT and a second set of independent reference voltages, and an output of the second circuit coupled to the plurality of comparators. The test circuit further comprises a select circuit coupled to outputs of the comparators, the output of the first circuit and the output of the second circuit. The select circuit outputting the outputs of the first circuit and the second circuit or outputting the outputs of the comparators.

Abstract: A tester circuit generating differential signals, single ended signals, or a fast transitioning signal to exercise inputs of a device under test is described. According to one embodiment, the tester circuit includes a first circuit configured to generate a first test signal on an input of the first driver. The tester circuit also includes a second circuit configured to generate a second test signal on an input of a second driver. Further, the tester circuit also includes select signals and select logic to determine the different testing modes of the device under test.