Abstract: An active semiconductor backplane for a matrix liquid crystal display comprises a plurality of mutually exclusive sets of electrically-addressable elements defining a pixel array. Scanning circuitry addresses the sets one at a time. Set selection circuitry addresses more than one of the plurality of sets simultaneously. Preferably, the sets are simultaneously addressable rows for fast blanking. Single pass and two-pass schemes for writing and re-writing the array are described.

Abstract: A packet router has an input stage (1), an output stage (15) and a coupling stage (10) for coupling the input and output stages. The input stage has plural input devices, the output stage has plural output devices and the coupling stage provides paths for signals between output elements of the input devices and input elements of the output devices. Each input device has circuitry arranged to respond to packet destination data of a packet received by its input device for adding, to the packet data of the packet, information indicative of a router output node at which the packet is to be output. The router has a controller (20) connected to the input stage and to the coupling stage for causing packets to be output to said coupling stage in dependence on this information. Each output device has circuitry for removing the information prior to output of packets.

Abstract: An optical switch uses two ferroelectric liquid crystal spatial light modulators (10, 11) with an interconnect region in between. The switch uses bulk lenses (2, 8) to focus light from an input fibre array (1) to a first spatial light modulator (10), and from the second spatial light modulator (11) to an output array (9). Each spatial light modulator displays a respective hologram selected from a previously calculated set, to cause a desired switching of light from the input fibre array to the output array.

Abstract: An optical switch uses a polarization insensitive spatial light modulator operating by a double pass through a liquid crystal cell. The switch includes two such modulators in a cross bar arrangement. Different embodiments employing techniques for reducing cross talk are described.

Abstract: An optical switch uses a polarisation insensitive spatial light modulator operation by a double pass through a liquid crystal cell. The switch includes two such modulators in a cross bar arrangement. Different embodiments employing techniques for reducing cross talk are described.

Abstract: In a method of signal processing for greyscale imaging in which weighted bitplanes corresponding to a greyscale image are stored as binary strings in sequential locations in a memory, in decreasing order of intended duration (weighting), a number of read passes equal to the number of weighted bitplanes are made from the set of stored bitplanes, each pass commencing with the highest order bitplanes and continuing along the stored bitplanes in sequence, the lengths of the sequences being varied and selected such that at the end of the said number of read passes each bit plane has been read out a plurality of times proportional to or equal to its duration (weighting). The method has utility in driving high speed liquid crystal matrix arrays particularly where each bitplane needs to be refreshed. A small ac potential may be applied to the array between writing steps.

Abstract: In a method of multi-level spatial light modulation, using a weighted bit plane technique where an n-digit binary number represents the intended grey level of each pixel location in an array of binary pixels, representative binary numbers are altered to closely adjacent values such as to reduce the inequality of 1s and 0s therein. The method may be applied to a single frame so modifying the gray scale somewhat, or a multi-frame method may be used in which at least some binary numbers are altered to different values in different frames for reducing the inequality of 1s and 0s over the set of frames, while maintaining or approximating the gray scale value as a time average. The methods are particularly useful for maintaining or approximating pixel-wise dc balance in liquid crystal spatial array modulators.

Abstract: Relates to constructions of a backplane which comprises an array of addressable active elements 52 on a semiconductor substrate 51 for selectively energizing respective first electrodes 65 of the array, for example in a liquid crystal matrix cell. To reduce photo-induced degradation of images produced thereby (a) at least part of the region beneath a first electrode is adapted to act as a capacitor, for example a depletion layer 66 acting as a reverse biased diode, and/or (b) substantially the whole of each active element is covered by a metallic conductor (59, 60—coupled to row and column conductors). In a variant of (b) the array of active elements may covered by an insulating layer, and each active element is connected to a metal electrode on the insulating layer, the array of said metal electrodes thus formed covering more than 65% of the area of said array.

Abstract: Relates to writing an array of optical elements which are each switched between two states according to input data sets. In a first method, data is written in two steps in which different selected elements are respectively driven to one binary state and the other binary state. The selected elements of the two sets may be complementary, but are preferably only those which are required to change from their existing state. The latter criterion may be used in an alternative method using a single addressing of the array to turn elements in either direction as required. In a further method, as shown, selected elements only of a blank array are written in a first WRITE step so as to correspond with a set of data, and in a subsequent second ERASE step the selected elements are selectively erased to restore a blank array prior to writing and erasing another set of data. The methods have particular utility for maintaining a dc balance at pixels of a liquid crystal array.

Abstract: In active semiconductor backplane (3), for example for a smectic liquid crystal cell, which comprises an array of electronic or elctrical elements in a first region (4), logic elements for addressing said array in a second region spaced from the first, and conductors coupling said first and second regions, the first and second regions are sufficiently widely spaced (21, 22) (providing a “glue lane”) to permit the presence of an adhesive sealing strip therebetween without substantial contact with the first and/or second regions, even when an opposed substrate is sealed thereto. The backplane may comprise spacers (25, 26) in the first region and/or glue lane.

Abstract: A display device has a number of pixels to display an image. A first set of electrodes and a second set of electrodes are provided. To display an image in accordance with image data, the first and second sets of electrodes are addressed with a first set of drive signals and a second set of drive signals respectively in order to drive the pixels of the display device. The first set of drive signals is predefined. The image data is compressed. The second set of drive signals is obtained from the compressed image data.

Abstract: An active semiconductor backplane (3) for a matrix liquid crystal display comprises a plurality of mutually exclusive sets of electrically addressable elements defining a pixel array (4), means (44) arranged to address the sets one at a time, and means (44, 45) for addressing more than one of the plurality of sets simultaneously. Preferably the sets are simultaneously addressable rows, for fast blanking. Single pass and two-pass schemes for writing and re-writing the array are described.

Abstract: In an active semiconductor backplane for a liquid crystal spatial light modulator, spacers (25) which are distributed over the backplane extend above an array of electrical and/or electronic elements and comprise at least two layers essentially of the same material and occuring in the same order as is found in at least one of the electrical or electronic elements, such as an NMOS transistor (52). The latter is formed from a stack of layers on a silicon substrate (51) comprising polysilicon (56), continuous silicon oxide (57) modified to include gate oxide GOX (55), metallic gate electrode (59), continuous silicon oxide (58) and a metallic drain electrode (60) which is coupled to a spaced mirror electrode over the layer (58). Likewise, spacer (25) comprises the layers (57 and 58) with metallic (67, 68) deposited simultaneously with electrodes (59, 60). The foot of layer (57) is differently modified to include field oxide layer (69) and polysilicon layers (70, 72) spaced by thin oxide (71).

Abstract: A liquid crystal display of the UV-phosphor type comprises a light source 1 for producing activation light at a predetermined narrow range of UV wavelengths, a collimator 3 for directing the activation light in parallel in a predetermined direction, a LC cell 5 formed from an array of pixels, a photoluminescent screen (7) on the cell arranged to emit a visible output when struck by the narrow-band excitation light passing through the cell, and a drive circuit for addressing the LC cell in a multiplexed manner. The direction of the light and the thickness of the cell are chosen to give the best contrast ratio for the liquid crystal. Such an effect is only possible when monochromatic, collimated light is used, which for a normal display is not practical.

Abstract: A collimator is formed of a stack of layers (11) of different thicknesses in a way analogous to a low-pass interference filter. When illuminated by narrow-band light of a predetermined wavelength just within the pass band of the filter, the collimator preferentially transmits light incident within a predetermined angular range, usually near-normal. The collimator is especially useful with photoluminescent liquid-crystal display, having phosphor emitters (17), because the collimator layers can simply be deposited on one face of the liquid-crystal modulator (1).

Abstract: Telecommunications switch architectures and switching methods based on the principle of replication/broadcasting some or all of the incoming data from each input-switch port to all output switch ports. The replicated data is transferred to the output ports either by the respective output port reading directly from a relevant address in an input memory, or by transferring the content of all or part of the input memory data simultaneously en bloc and in parallel to a plurality of output memories, with each output port then taking the data intended therefor. The input and output data is in serial form but transferred in parallel form. The data can be replicated optically or electronically. In particular, the input data can be formatted as spatially arranged pages in the optical domain by spatial light modulators (SLM) and switched by an image replicating optical switch, such as a matrix-matrix switch, to an output plane at which a second SLM device converts the data back to serial form.

Abstract: In an active back-plane co-ordinate addressed liquid crystal cell exhibiting an analogue optical response to the application of an analogue electric potential, refreshing is carried out in two sequential stages in order to avoid cumulative charge imbalance effects. In one stage the pixels are set to their required optical states using the appropriate applied potential differences, and in the other stage the pixels are set with the same potential differences, but applied the other way round.

Abstract: A smart pixel is comprised by a chiral smectic liquid crystal light modulator (45) (ferro-electric or electroclinic) disposed on a semiconductor substrate and having associated therewith electronic circuitry (41-44) formed in the semiconductor substrate in particular a single crystal silicon VLSI substrate, which circuitry is such as to provide localised intelligence (electrical signal processing and conditioning, pointwise operations, logic functions) at the modulator. The circuitry may comprise photodetector/threshold circuitry (FIG. 7) or digital-to-analogue conversion (FIGS. 3 or 4), for example.

Abstract: An optical logic device consists of a bistable liquid crystal layer (BOD 1) of the thermally-induced birefringent (TIB) type settable by one or more write beams and rfead by a beam of a different wavelength or different light polarization. Thus the read and write beams are optically decoupled. Two such devices (BOD 1 and BOD 2) in tandem form a 3-input AND gate. Here beams A and B are write beams for the first device, (BOD 1), and beam C is the read beam for the first device. For the second device (BOD 2) the write beams are the output of the first device (BOD 1) and beam D, the read beam being beam E. The two read beams have different wavelengths from the write beam. In a second version, the liquid crystal layer is on the base of a prism via which the beams reads it. Write beams go right through the layer, while a read beam is "reflected" from the layer but is modulated by the state thereof. This is an OR gate. Logic assemblies can use combinations of such AND or OR gates.

Abstract: Bistable operation of ferroelectric liquid crystal smectic I* or smectic F* display cells is disclosed which uses a greater liquid crystal layer thickness than is achievable with smectic C* material while yet retaining bistability of operation.