Abstract: A computer implemented method for the automated analysis or use of data is implemented by a voice assistant. The method comprises the steps of (a) storing in a memory a structured, machine-readable representation of data that conforms to a machine-readable language (‘machine representation’); the machine representation including representations of user speech or text input to a human/machine interface; and (b) automatically processing the machine representations to analyse the user speech or text input.

Abstract: A computer implemented method for the automated analysis or use of data is implemented by a voice assistant. The method comprises the steps of: (a) storing in a memory a structured, machine-readable representation of data that conforms to a machine-readable language (‘machine representation’); the machine representation including representations of user speech or text input to a human/machine interface; and (b) automatically processing the machine representations to analyse the user speech or text input.

Abstract: A computer implemented method for the automated analysis or use of data is implemented by a voice assistant. The method comprises the steps of: (a) storing in a memory a structured, machine-readable representation of data that conforms to a machine-readable language (‘machine representation’); the machine representation including representations of user speech or text input to a human/machine interface; and (b) automatically processing the machine representations to analyse the user speech or text input.

Abstract: A computer implemented method for the automated analysis or use of data is implemented by a voice assistant. The method comprises the steps of (a) storing in a memory a structured, machine-readable representation of data that conforms to a machine-readable language (‘machine representation’); the machine representation including representations of user speech or text input to a human/machine interface; and (b) automatically processing the machine representations to analyse the user speech or text input.

Abstract: Embodiments for providing single-producer-multiple consumers synchronization and multicast data transfer by a processor are disclosed. Multicast data transfer is synchronized based on an identification tag and a request from each one of a plurality of recipients for the multicast data. The multicast data is transferred to each of the plurality of recipients based on the identification tag, the request from each one of the plurality of recipients, and a list of the plurality of recipients.

Abstract: Embodiments of the present invention include a computer system that manages execution of one or more programs with one or more loops where each loop having a loop level. Embodiments that manage loops that can skip execution and the number of loops changing during execution are also disclosed. A loop level register (LLEV) stores the loop level for a currently executing loop. A Loop-Back Program Counter Register (LBPR) has a table of one or more Loop-Back Registers. Each Loop-Back Register stores the loop level for a LBPR respective loop and a loop back PC location for the LBPR respective loop. A Program Counter points back to the PC location for each iteration of the loop. A Loop Current Count Register table (LCCR) tracks a number of iterations remaining to executed for of the loop. A loop management process causes one of the CPUs to execute all the one or more instructions of an iteration of the currently executing program loop.

Abstract: A method of modifying the surface of an electrical or electronic device. The method has the steps of: placing the electrical or electronic device in a processing chamber; reducing the pressure in the processing chamber; applying a surface modification process within the processing chamber; wherein the electrical or electronic device comprises a screen (150), said screen comprising first and second layers (154, 156) separated by an air gap (172), and an air vent (196, 198) providing fluid communication between the air gap and the exterior of the electrical or electronic device, such that a reduction in pressure in the processing chamber results in a reduction in pressure in the air gap.

Abstract: A no-till apparatus for application of herbicide and fertilizer, soil preparation, and seeding of a cover crop in a standing crop has inter-row assemblies configured to pass along inter-row areas between adjacent row lines of standing crop plants. Each assembly includes a fertilizer applicator, a no-till soil preparation element, a cover crop seed applicator, and a post-seeding element. The apparatus may include movable auxiliary seeding units such that the apparatus may operate as a grain drill.

Abstract: A no-till apparatus for application of herbicide and fertilizer, soil preparation, and seeding of a cover crop in a standing crop has inter-row assemblies configured to pass along inter-row areas between adjacent row lines of standing crop plants. Each assembly includes a fertilizer applicator, a no-till soil preparation element, a cover crop seed applicator, and a post-seeding element. The apparatus may include movable auxiliary seeding units such that the apparatus may operate as a grain drill.

Abstract: A no-till apparatus for application of herbicide and fertilizer, soil preparation, and seeding of a cover crop in a standing crop has inter-row assemblies configured to pass along inter-row areas between adjacent row lines of standing crop plants. Each assembly includes a fertilizer applicator, a no-till soil preparation element, a cover crop seed applicator, and a post-seeding element.

Abstract: A no-till apparatus for application of herbicide and fertilizer, soil preparation, and seeding of a cover crop in a standing crop has inter-row assemblies configured to pass along inter-row areas between adjacent row lines of standing crop plants. Each assembly includes a fertilizer applicator, a no-till soil preparation element, a cover crop seed applicator, and a post-seeding element.

Abstract: A no-till apparatus for application of herbicide and fertilizer, soil preparation, and seeding of a cover crop in a standing crop has inter-row assemblies configured to pass along inter-row areas between adjacent row lines of standing crop plants. Each assembly includes a fertilizer applicator, a no-till soil preparation element, a cover crop seed applicator, and a post-seeding element.

Abstract: A no-till apparatus for application of herbicide and fertilizer, soil preparation, and seeding of a cover crop in a standing crop has inter-row assemblies configured to pass along inter-row areas between adjacent row lines of standing crop plants. Each assembly includes a fertilizer applicator, a no-till soil preparation element, a cover crop seed applicator, and a post-seeding element. The apparatus may include movable auxiliary seeding units such that the apparatus may operate as a grain drill.

Abstract: A lighting source that can be deployed in a hazardous environment is disclosed. For example, the lighting source comprises at least one light emitting diode and a power supply for providing power to the at least one light emitting diode. The lighting source also comprises an enclosure for housing the at least one light emitting diode and the power supply, where said lighting source is for deployment in a hazardous environment.

Abstract: A no-till apparatus for application of herbicide and fertilizer, soil preparation, and seeding of a cover crop in a standing crop has inter-row assemblies configured to pass along inter-row areas between adjacent row lines of standing crop plants. Each assembly includes a fertilizer applicator, a no-till soil preparation element, a cover crop seed applicator, and a post-seeding element.

Abstract: A method and apparatus for providing a luminaire employing at least one Light Emitting Diode (LED) device as the light source and a metal beverage container as the luminaire housing.

Abstract: A lighting source that can be deployed in a hazardous environment is disclosed. For example, the lighting source comprises at least one light emitting diode and a power supply for providing power to the at least one light emitting diode. The lighting source also comprises an enclosure for housing the at least one light emitting diode and the power supply, where said lighting source is for deployment in a hazardous environment.

Abstract: A lighting source that can be deployed in a hazardous environment is disclosed. For example, the lighting source comprises at least one light emitting diode and a power supply for providing power to the at least one light emitting diode. The lighting source also comprises an enclosure for housing the at least one light emitting diode and the power supply, where said lighting source is for deployment in a hazardous environment.

Abstract: A method of operating an arithmetic logic unit (ALU) by inverting a result of an operation to be executed during a current cycle in response to control signals from instruction decode logic which indicate that a later operation will require a complement of the result, wherein the result is inverted during the current cycle. The later operation may be a subtraction operation that immediately follows the first operation. The later instruction is decoded prior to the current cycle to control the inversion in the ALU. The ALU includes an adder, a rotator, and a data manipulation unit which invert the result during the current cycle in response to an invert control signal. The second operation subtracts the result during a subsequent cycle in which a carry control signal to the adder is enabled, and the rotator and the data manipulation unit are disabled. The ALU may be used in an execution unit of a microprocessor, such as a fixed-point unit.

Abstract: An apparatus and method for executing a Load Register instruction in which the source data of the Load Register instruction is retained in its original physical register while the architected target register is mapped to this same physical target register. In this state the two architected registers alias to one physical register. When the source register of the Load Address instruction is specified as the target address of a subsequent instruction, a free physical register is assigned to the Load Registers source register. And with this assignment the alias is thus broken. Similarly when the target register of the Load Address instruction is the target address of a subsequent instruction, a new physical register is assigned to the Load Registers target address. And with this assignment the alias is thus broken.