Abstract: A dual threshold comparator circuit includes a comparator amplifier for comparing an analog input signal to a threshold waveform. The threshold waveform is generated in a circuit which includes positive and negative peak detector circuits and a slope detector circuit, all of which are connected to the analog signal source. A voltage divider is connected across the output of the positive and negative peak detector circuits. The threshold input to the comparator amplifier is connected to the common junction of first and second serially-connected impedances in the voltage divider. At the beginning of a particular half cycle of the analog input signal, the voltage across the voltage divider is equal to the difference of the most recent positive and negative peak voltages. The slope detector alters the effective impedances in the voltage divider to cause the threshold voltage to be equal to 25 or 75% of the total difference voltage, depending upon the slope of the analog signal.