Patents by Inventor William D. Goodhue

William D. Goodhue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10109671
    Abstract: There is provided an avalanche photodiode array that includes a plurality of avalanche photodiodes. Each avalanche photodiode in the array includes a stack of active photodiode materials. The stack of active photodiode materials includes a first electrical contact layer, a second electrical contact layer; an absorber material layer and an avalanche material layer each disposed between the first electrical contact layer and the second electrical contact layer; and an optical interface surface to the avalanche photodiode. The optical interface surface consists of an exposed surface of the first electrical contact layer, arranged for incident external radiation to directly enter the first electrical contact layer. Each avalanche photodiode stack of active photodiode materials is laterally isolated from the other avalanche photodiodes in the photodiode array.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: October 23, 2018
    Assignee: Massachusetts Institute of Technology
    Inventors: Joseph P Donnelly, K Alexander McIntosh, Erik K Duerr, William D Goodhue, Robert J Bailey, Lisa A Wright
  • Publication number: 20180040663
    Abstract: There is provided an avalanche photodiode array that includes a plurality of avalanche photodiodes. Each avalanche photodiode in the array includes a stack of active photodiode materials. The stack of active photodiode materials includes a first electrical contact layer, a second electrical contact layer; an absorber material layer and an avalanche material layer each disposed between the first electrical contact layer and the second electrical contact layer; and an optical interface surface to the avalanche photodiode. The optical interface surface consists of an exposed surface of the first electrical contact layer, arranged for incident external radiation to directly enter the first electrical contact layer. Each avalanche photodiode stack of active photodiode materials is laterally isolated from the other avalanche photodiodes in the photodiode array.
    Type: Application
    Filed: May 23, 2017
    Publication date: February 8, 2018
    Applicant: Massachusetts Institute of Technology
    Inventors: Joseph P. Donnelly, K. Alexander McIntosh, Erik K. Duerr, William D. Goodhue, Robert J. Bailey, Lisa A. Wright
  • Patent number: 6933244
    Abstract: A method passivates a surface of a semiconductor structure. The method provides III-V semiconductor material having a surface to be passivated. Upon the surface of the III-V semiconductor material to be passivated an oxide layer is formed. Thereafter, the surface of the III-V semiconductor material having the oxide layer is passivated, without desorption of the oxide layer and in a vacuum of 2×10?6 Torr, with a material having the ability to intermix with the oxide layer so as to exchange oxygen, passivation layer material, and III-V semiconductor material therebetween to form graded layers of oxidized III-V and passivation material.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: August 23, 2005
    Assignee: Massachusetts Institute of Technology
    Inventor: William D. Goodhue
  • Patent number: 6829269
    Abstract: The present invention is directed to the development of compact, coherent sources emitting in the terahertz frequency region using interface phonons. In accordance with a preferred embodiment, a semiconductor heterostructure light emitting device includes a quantum cascade structure having at least an upper lasing level and a lower lasing level. The system uses heterostructure interface phonon bands to depopulate the lower lasing level of at least a three level semiconductor device. The device includes multiple coupled quantum well modules. In alternate preferred embodiments, the device includes quantum dot layers and/or, quantum wire structures, and/or mini-bands in a superlattice, for example, GaAs/AlGaAs superlattice. The phonons in the device improve efficiency, decrease the threshold current and result in system temperatures that are as high as room temperature. The semiconductor device provides emission of terahertz radiation.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: December 7, 2004
    Assignees: University of Massachusetts, Worcester Polytechnic Institute
    Inventors: William D. Goodhue, L. Ramdas Ram-Mohan, Aram Karakashian, Vinod Menon
  • Publication number: 20030219052
    Abstract: The present invention is directed to the development of compact, coherent sources emitting in the terahertz frequency region using interface phonons. In accordance with a preferred embodiment, a semiconductor heterostructure light emitting device includes a quantum cascade structure having at least an upper lasing level and a lower lasing level. The system uses heterostructure interface phonon bands to depopulate the lower lasing level of at least a three level semiconductor device. The device includes multiple coupled quantum well modules. In alternate preferred embodiments, the device includes quantum dot layers and/or, quantum wire structures, and/or mini-bands in a superlattice, for example, GaAs/AlGaAs superlattice. The phonons in the device improve efficiency, decrease the threshold current and result in system temperatures that are as high as room temperature. The semiconductor device provides emission of terahertz radiation.
    Type: Application
    Filed: May 21, 2002
    Publication date: November 27, 2003
    Applicant: University of Massachusetts
    Inventors: William D. Goodhue, L. Ramdas Ram-Mohan, Aram Karakashian, Vinod Menon
  • Publication number: 20030219994
    Abstract: A method passivates a surface of a semiconductor structure. The method provides III-V semiconductor material having a surface to be passivated. Upon the surface of the III-V semiconductor material to be passivated an oxide layer is formed. Thereafter, the surface of the III-V semiconductor material having the oxide layer is passivated, without desorption of the oxide layer and in a vacuum of 2×10−6 Torr, with a material having the ability to intermix with the oxide layer so as to exchange oxygen, passivation layer material, and III-V semiconductor material therebetween to form graded layers of oxidized III-V and passivation material.
    Type: Application
    Filed: January 10, 2003
    Publication date: November 27, 2003
    Inventor: William D. Goodhue
  • Patent number: 5834840
    Abstract: An electronic device package is provided, consisting of reaction bonded silicon nitride structural and dielectric components and conductor, resistor, and capacitor elements positioned with the package structural components. The package consists of a ceramic package base characterized by a dielectric constant less than 6, of reaction bonded silicon nitride, or a heat spreader material. An electrical conductor is positioned on, embedded in, or attached to the package base for making electrical contact to an electronic device supported on the base and in preferred embodiments, a resistor is attached to the package base. The invention also provides package sidewalls connected to the package base, preferably of reaction bonded silicon nitride, and at least one electrical conductor extending to an outside surface of the package sidewalls for making electrical contact to an electronic device supported by the package base.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: November 10, 1998
    Assignees: Massachusetts Institute of Technology, Charles Stark Draper Laboratory, Inc.
    Inventors: William L. Robbins, John S. Haggerty, Dennis D. Rathman, William D. Goodhue, George B. Kenney, Annamarie Lightfoot, R. Allen Murphy, Wendell E. Rhine, Julia Sigalovsky
  • Patent number: 5801073
    Abstract: A method of producing electronic device packages is provided, consisting of the steps of shaping a package preform and heating the package preform in a nitrogen-containing atmoshpere to nitride the package preform. The shaped package preform may consist of package base, sidewall, conductor, resistor, or capacitor components. The package base and sidewall components may be formed of silicon powder. The method also accommodates the step of inserting a semiconducting material into the package preform and heating the semiconducting material component along with the package preform. The inserted semiconducting material component may be processed to define active electronic device areas on the component either before or after the step of heating the shaped package preform and inserted semiconducting material component.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: September 1, 1998
    Assignees: Charles Stark Draper Laboratory, Massachusetts Institute of Technology
    Inventors: William L. Robbins, John S. Haggerty, Dennis D. Rathman, William D. Goodhue, George B. Kenney, Annamarie Lightfoot, R. Allen Murphy, Wendell E. Rhine, Julia Sigalovsky
  • Patent number: 5313324
    Abstract: This invention provides an optical converter suitable for use as the gain medium in lasers, optical amplifiers and other optical devices. The converter consists of at least one and preferable two or more optical converter elements which are sandwiched and separated by inactive dielectric layers. An optical pump beam may be passed to the active converter elements through an anti-reflection layer at one surface of the converter and a high reflection mirror may be provided at the opposite side of the converter to reflect the pump beam incident thereon back into the converter for a second pass.
    Type: Grant
    Filed: March 27, 1991
    Date of Patent: May 17, 1994
    Assignee: Massachusetts Institute of Technology
    Inventors: Han Q. Le, William D. Goodhue
  • Patent number: 5105248
    Abstract: An electro-optical device comprising a CCD structure having charge wells, the charges therein being controlled by a modulating signal applied to said CCD structure. A multiple quantum well structure having quantum well regions associated with the charge wells of said CCD structure, the charges in the CCD charge wells determining the value of the electric fields at said quantum well regions and, hence, the electro-absorption effects at said quantum well regions. The intensity of an input electromagnetic wave signal directed through said electro-optical device is thereby spatially modulated by the electro-absorption effects at the quantum well regions of the multiple quantum well structure. A novel CCD structure using quantum well regions to form the charge wells thereof can be used as the CCD structure for controlling the electric fields at the multiple quantum well structure.
    Type: Grant
    Filed: January 11, 1990
    Date of Patent: April 14, 1992
    Assignee: Massachusetts Institute of Technology
    Inventors: Barry E. Burke, William D. Goodhue, Jr., Kirby B. Nichols
  • Patent number: 4999316
    Abstract: A method and apparatus for forming tapered thickness and material content of III-V material, or alloys thereof, in particular GaAs and AlGaAs, by gradient thermal heating of substrates during epitaxial growth and the optoelectronic structures formed thereby.
    Type: Grant
    Filed: March 17, 1989
    Date of Patent: March 12, 1991
    Assignee: Massachusetts Institute of Technology
    Inventors: William D. Goodhue, Robert H. Rediker, Donald E. Bossi
  • Patent number: 4956844
    Abstract: An improved two-dimensional semiconductor surface-emitting laser array is described in which two intra-cavity internal reflecting surfaces are formed at a 45.degree. angle to the plane of the active layer of the semiconductor laser so as to internally reflect light from each end of the active layer in a direction normal to the plane of the active layer with a buried reflective mirror provided in the path of one of said reflections, so as to transmit reflected light back through the laser and out the top surface of the array.
    Type: Grant
    Filed: March 17, 1989
    Date of Patent: September 11, 1990
    Assignee: Massachusetts Institute of Technology
    Inventors: William D. Goodhue, Kurt Rauschenbach, Christine A. Wang
  • Patent number: 4855255
    Abstract: A method and apparatus for forming tapered thickness and material content of III-V material, or alloys thereof, in particular GaAs and AlGaAs, by gradient thermal heating of substrates during epitaxial growth and the optoelectronic structures formed thereby.
    Type: Grant
    Filed: March 23, 1988
    Date of Patent: August 8, 1989
    Assignee: Massachusetts Institute of Technology
    Inventor: William D. Goodhue
  • Patent number: 4848880
    Abstract: An electro-optical device for providing spatial modulation of an incoming electromagnetic wave signal, and preferably a two-dimensional incoming signal applied orthogonally to an input plane of the device, which device includes an array of modulation regions for providing such modulation of portions of the incoming signal. An array of first reflective mirrors are positioned so as to direct the incoming electromagnetic wave signal portions through the interaction layer regions of the modulation regions in a direction substantially parallel thereto and an array of second reflective mirrors directs the modulated electromagnetic wave signal portions outwardly from the device to provide a two-dimensional spatially modulated output electromagnetic wave signal.
    Type: Grant
    Filed: November 13, 1987
    Date of Patent: July 18, 1989
    Assignee: Massachusetts Institute of Technology
    Inventors: Brian F. Aull, William D. Goodhue
  • Patent number: 4839310
    Abstract: Horizontal and vertical transistors, such as, HEMT/SDHT devices are described with opposed gates for preventing substrate leakage current along with the methods for making same. Also a process for making single gate angled V-HEMT devices is described.
    Type: Grant
    Filed: January 27, 1988
    Date of Patent: June 13, 1989
    Assignee: Massachusetts Institute of Technology
    Inventors: Mark A. Hollis, William D. Goodhue, Kirby B. Nichols, Normand J. Bergeron, Jr.