Abstract: A system detects an acoustic-wave-producing downhole event associated with a pipe at an uphole location in the presence of surface noise. The system comprises: a first plurality of acoustic sensors located a first axial position along the pipe and oriented symmetrically about the pipe axis; and a second plurality of acoustic sensors located a second axial position along the pipe and oriented symmetrically about the pipe axis, the second axial position spaced apart from the first axial position. A processor is connected to receive the signals from the first and second pluralities of sensors and configured to process the sensor signals to thereby produce an output signal. The processor is configured to adjust the digital processing, based on the sensor signals, to minimize a contribution of the surface noise to the output signal.

Abstract: Methods determine a state of a well and comprise: receiving a set of well operations data comprising at least some measured well operations data; determining the occurrence of a well operations event based on the received data; evaluating one or more possible state transitions from a current well operations state to one or more possible new well operations states, the current state and the possible new states selected from a configurable plurality of well operations states, wherein evaluating the one or more possible state transitions is based on the current state, the determined event and the received data and wherein evaluating the one or more possible state transitions comprises determining a confidence level associated with each of the possible new states; and determining one of the possible new states to be a new predicted well operations state according to whichever possible new state has a highest confidence level.

Abstract: A system detects an acoustic-wave-producing downhole event associated with a pipe at an uphole location in the presence of surface noise. The system comprises: a first plurality of acoustic sensors located a first axial position along the pipe and oriented symmetrically about the pipe axis; and a second plurality of acoustic sensors located a second axial position along the pipe and oriented symmetrically about the pipe axis, the second axial position spaced apart from the first axial position. A processor is connected to receive the signals from the first and second pluralities of sensors and configured to process the sensor signals to thereby produce an output signal. The processor is configured to adjust the digital processing, based on the sensor signals, to minimize a contribution of the surface noise to the output signal.

Abstract: A system detects an acoustic-wave-producing downhole event associated with a pipe at an uphole location in the presence of surface noise. The system comprises: a first plurality of acoustic sensors located a first axial position along the pipe and oriented symmetrically about the pipe axis; and a second plurality of acoustic sensors located a second axial position along the pipe and oriented symmetrically about the pipe axis, the second axial position spaced apart from the first axial position. A processor is connected to receive the signals from the first and second pluralities of sensors and configured to process the sensor signals to thereby produce an output signal. The processor is configured to adjust the digital processing, based on the sensor signals, to minimize a contribution of the surface noise to the output signal.

Abstract: A system detects an acoustic-wave-producing downhole event associated with a pipe at an uphole location in the presence of surface noise. The system comprises: a first plurality of acoustic sensors located a first axial position along the pipe and oriented symmetrically about the pipe axis; and a second plurality of acoustic sensors located a second axial position along the pipe and oriented symmetrically about the pipe axis, the second axial position spaced apart from the first axial position. A processor is connected to receive the signals from the first and second pluralities of sensors and configured to process the sensor signals to thereby produce an output signal. The processor is configured to adjust the digital processing, based on the sensor signals, to minimize a contribution of the surface noise to the output signal.

Abstract: A communication method is provided for a communication system comprising a transmitter and a receiver. The method involves communicating data from the transmitter to the receiver over a banded communication channel. The method comprises: applying a forward error correction, FEC, code to data to be transmitted to obtain FEC-encoded data; assigning the FEC-encoded data into a plurality of sub-channels; modulating the data from each of the plurality of sub-channels into a corresponding one of a plurality of sub-bands, the plurality of sub-bands having spaced apart center frequencies; and concurrently transmitting the data from the plurality of sub-bands onto a banded communication channel, the banded communication channel comprising one or more pass-bands and one or more stop-bands.

Abstract: A communication method is provided for a communication system comprising a transmitter and a receiver. The method involves communicating data from the transmitter to the receiver over a banded communication channel The method comprises: applying a forward error correction, FEC, code to data to be transmitted to obtain FEC-encoded data; assigning the FEC-encoded data into a plurality of sub-channels; modulating the data from each of the plurality of sub-channels into a corresponding one of a plurality of sub-bands, the plurality of sub-bands having spaced apart center frequencies; and concurrently transmitting the data from the plurality of sub-bands onto a banded communication channel, the banded communication channel comprising one or more pass-bands and one or more stop-bands.

Abstract: A communication method is provided for a communication system comprising a transmitter and a receiver. The method involves communicating data from the transmitter to the receiver over a banded communication channel. The method comprises: applying a forward error correction, FEC, code to data to be transmitted to obtain FEC-encoded data; assigning the FEC-encoded data into a plurality of sub-channels; modulating the data from each of the plurality of sub-channels into a corresponding one of a plurality of sub-bands, the plurality of sub-bands having spaced apart center frequencies; and concurrently transmitting the data from the plurality of sub-bands onto a banded communication channel, the banded communication channel comprising one or more pass-bands and one or more stop-bands.

Abstract: A communication method is provided for a communication system comprising a transmitter and a receiver. The method involves communicating data from the transmitter to the receiver over a banded communication channel The method comprises: applying a forward error correction, FEC, code to data to be transmitted to obtain FEC-encoded data; assigning the FEC-encoded data into a plurality of sub-channels; modulating the data from each of the plurality of sub-channels into a corresponding one of a plurality of sub-bands, the plurality of sub-bands having spaced apart center frequencies; and concurrently transmitting the data from the plurality of sub-bands onto a banded communication channel, the banded communication channel comprising one or more pass-bands and one or more stop-bands.

Abstract: A method to look at the incoming received data on a SerDes link while running in normal operation without requiring a second receive path or any defined or repeated data patterns to be able to generate statistical eye plots both before and after any internal equalization; generate trajectory eye plots both before and after any internal equalization; estimate TED characteristics (hence also estimate SJ jitter tolerance of the link); estimate complete Channel Impulse Response (hence also estimate the S-parameters of the complete channel); and estimate the decomposed jitter of the complete channel.

Abstract: A clock signal generator responsive to a frequency control word and a reference clock signal having a reference clock frequency fref. The clock signal generator generates an output clock signal having a frequency fgen, wherein fgen is less than fref. A modulo-N counter accepts the reference clock signal as input. The modulo-N counter generates a phase-indication signal of the reference clock. The phase indication signal has N clock phases repeating at a frequency of fref/N. An accumulator iteratively accumulates a frequency control word into a modulo-N adder and produces an accumulated value. One or more bits of the accumulated value is fed-back into the modulo-N adder for adding modulo N to the accumulated value in the next iteration. N of the modulo-N adder is the same integer as in the modulo-N counter.

Abstract: The present invention is related to methods and apparatus that compensate for quadrature impairments of an analog quadrature modulator and/or demodulator over a relatively wide signal bandwidth. One embodiment pre-distorts baseband signals in a quadrature modulator compensation signal processor (QMCSP) to negate the quadrature impairment of an analog quadrature modulator and corrects a received baseband signal in a quadrature demodulator compensation signal processor (QDCSP) to cancel the quadrature impairment of an analog quadrature demodulator. The QMCSP and the QDCSP contain adaptive digital filter correction structures that pre-compensate and post-compensate, respectively, for the quadrature impairments introduced by the analog quadrature modulator and the analog quadrature demodulator over a relatively wide bandwidth.

Abstract: A clock signal generator responsive to a frequency control word and a reference clock signal having a reference clock frequency fref. The clock signal generator generates an output clock signal having a frequency fgen, wherein fgen is less than fref. A modulo-N counter accepts the reference clock signal as input. The modulo-N counter generates a phase-indication signal of the reference clock. The phase indication signal has N clock phases repeating at a frequency of fref/N. An accumulator iteratively accumulates a frequency control word into a modulo-N adder and produces an accumulated value. One or more bits of the accumulated value is fed-back into the modulo-N adder for adding modulo N to the accumulated value in the next iteration. N of the modulo-N adder is the same integer as in the modulo-N counter.

Abstract: The present invention is related to methods and apparatus that compensate for quadrature impairments of an analog quadrature modulator and/or demodulator over a relatively wide signal bandwidth. One embodiment pre-distorts baseband signals in a quadrature modulator compensation signal processor (QMCSP) to negate the quadrature impairment of an analog quadrature modulator and corrects a received baseband signal in a quadrature demodulator compensation signal processor (QDCSP) to cancel the quadrature impairment of an analog quadrature demodulator. The QMCSP and the QDCSP contain adaptive digital filter correction structures that pre-compensate and post-compensate, respectively, for the quadrature impairments introduced by the analog quadrature modulator and the analog quadrature demodulator over a relatively wide bandwidth.