Patents by Inventor William E. Gandy, Jr.

William E. Gandy, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6392266
    Abstract: A method is provided for suppressing a transient signal (VTR) using a single semiconductor die (130). The method comprises the step of loading the transient signal with first and second junctions (110, 112) formed adjacent to a first doped region (140) of the semiconductor die. The first junction breaks down to generate a current while the second junction forward biases to route the current across an undepleted portion (161) of the first doped region and through the second junction.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: May 21, 2002
    Assignee: Semiconductor Components Industries LLC
    Inventors: Francine Y. Robb, William E. Gandy, Jr., Alfredo Ochoa, Jeffrey Pearse
  • Patent number: 4886762
    Abstract: An improved monolithic, temperature compensated voltage- reference diode is realized by creating a tub of epitaxial semiconductor material in a substrate of opposite conductivity type and creating a voltage reference junction at a surface of the tub. The junction between the tub and the substrate forms the forward-biased, temperature compensating junction of the device. The dopant concentration is varied during growth of the epitaxial material to provide a relatively low resistivity at the voltage-reference junction and a higher resistivity at the temperature compensating junction. The method described offers significant improvement over prior methods of manufacturing such devices in the area of cost and reliability.
    Type: Grant
    Filed: July 3, 1989
    Date of Patent: December 12, 1989
    Assignee: Motorola Inc.
    Inventors: Bernard W. Boland, William E. Gandy, Jr., Kevin B Jackson
  • Patent number: 4870467
    Abstract: An improved monolithic, temperature compensated voltage-reference diode is realized by creating a tub of epitaxial semiconductor material in a substrate of opposite conductivity type and creating a voltage reference junction at a surface of the tub. The junction between the tub and the substrate forms the forward-biased, temperature compensating junction of the device. The dopant concentration is varied during growth of the epitaxial material to provide a relatively low resistivity at the voltage-reference junction and a higher resistivity at the temperature compensating junction. The method described offers significant improvement over prior methods of manufacturing such devices in the area of cost and reliability.
    Type: Grant
    Filed: August 6, 1985
    Date of Patent: September 26, 1989
    Assignee: Motorola, Inc.
    Inventors: Bernard W. Boland, William E. Gandy, Jr., Kevin B. Jackson
  • Patent number: 4732866
    Abstract: Zener diodes and other semiconductor junctions having very low noise characteristics and improved yield may be obtained by first ion implanting a suitable impurity into a substrate wafer, and then forming the p-n junction using a very rapid thermal activation and annealing process. For p-n junctions formed with boron (.sup.11 B) implanted into n-type silicon to a peak concentration exceeding 10.sup.20 atoms/cm.sup.3, the rapid activation process comprises heating from about room temperature to about 1150.degree. C. in 12-30 seconds, and then cooling back below 1000 degrees C. in less than 5 seconds. Noise voltages measured on devices formed using the invented process were typically much lower and more narrowly grouped than on devices of the prior art. Dynamic impedance was also slightly reduced.
    Type: Grant
    Filed: March 12, 1984
    Date of Patent: March 22, 1988
    Assignee: Motorola Inc.
    Inventors: Jerry L. Chruma, William E. Gandy, Jr., Tommie R. Huffman, Syd R. Wilson