Abstract: A two-dimensional imaging system employs a multiplicity of radiation sensors disposed in an array of rows and columns. In order to couple signals from each of the sensors from an inaccessible location to an accessible location for processing of the sensor signals to produce an image of a subject viewed by the sensors, a fiber optic link employing both frequency multiplexing and frequency modulation of sensor data connects the sensor array with the signal processing equipment. In each column of the array, the sensors produce electrical signals which are coupled via a multiplexer to modulate the frequency of a voltage-controlled oscillator. A plurality of oscillators are provided for the concurrent generation of frequency-modulated signals which are then summed together to produce a composite signal. The composite signal is transmitted via a fiber-optic link to the signal processing equipment wherein the composite signal is demodulated and the frequency contributions of the various sensors are identified.

Abstract: A focal plane array for scanned imaging systems provides an increased dynamic range by encoding analog differences between scene pixel amplitudes at a detector unit cell. Charge Coupled Device (CCD) differentiators are utilized to encode the pixel deltas at the unit cell. These deltas are summed and transmitted in time delay and integration fashion with a CCD readout register. DC sense edge detector information is read out independently of the register AC signals, and thus provides a level from which to begin integration of the pixel deltas. The DC and AC scene information are contained in the reconstructed video.

Abstract: A charge transfer differentiator having a layer of semiconductor material and a contiguous film of overlying electrically insulating material includes a first electrode fed by a first voltage wherein the first electrode is embedded in the film, for establishing an electric potential at the interface between the film and layer. A second electrode fed by a second voltage and a third electrode fed by a third voltage are embedded in the film and charge-coupled to the first electrode for establishing potential barriers at said interface. These electrodes and voltages provide a potential well at the interface. Also included is a fourth electrode embedded in the layer fed by a fourth voltage, and a fifth and sixth electrode separated from each other and embedded in the film, wherein the fifth and sixth electrodes are fed by a clock voltage, the fourth, fifth and sixth electrodes are charge-coupled to the second electrode so as to provide a constant input charge to the potential well.

Abstract: A signal compressor apparatus utilizing a charge coupled device having a charge storage well wherein the charge storage capacity is variable over the integration time of the device. During the minimum charge storage period, the input charge which exceeds an established limit is dumped, thereby providing compression of the input signal.

Abstract: An analog-to-digital converter includes a charge coupled device comparator receiving an analog signal which is to be converted to an eight bit binary word. An eight bit charge coupled device shift register addresses an eight bit digital-to-analog converter through eight separate resettable latches to generate a reference signal which is compared in successive approximations to the analog signal by the charge coupled device comparator to generate each binary bit of the eight bit word. Sensitivity of the charge coupled device comparator is enhanced by the use of charge coupled regenerative feedback to generate each binary bit of the eight bit binary word, which is read serially into an output register. The charge coupled device comparator decides whether each bit of the eight bit binary word is to be a logic one or a logic zero by comparing the analog input signal with reference signals selected in successive approximations by a shift register addressing the digital-to-analog converter.

Abstract: A charge injection means periodically introduces a charge packet into a charge flow channel in a semiconductive substrate surface under the control of a clock signal. The charge packets are accumulated beneath an integrating electrode in the charge flow channel until the amount of charge stored beneath the integrating electrode reaches a predetermined amount. Upon this occurrence, the charge subsequently injected spills over a potential barrier and into charge sensing means near the integrating electrode. The charge sensing means responds to the spilled charge by causing substantially the entire accumulated charge to be spilled over the barrier into the charge sensing means in a regenerative feedback loop. Operation of the regenerative feedback loop accelerates a change in potential of the integrating electrode, causing an electrical output pulse to be generated at the integrating electrode.

Abstract: A CCD background subtractor having a first charge storage arrangement for detecting, during periodic sampling intervals, the peak value of an applied input signal, and a second charge storage arrangement into which charge representative of said peak value is periodically transferred and held. A third charge storage arrangement also receives the applied input signal and is controlled as a function of the charge held in the second charge storage arrangement such that the output signal from the third charge storage arrangement is representative of the difference between the applied input signal and the peak value thereof sampled during a prior sampling interval.

Abstract: A charge transfer multiplying feedback A/D converter is provided wherein a CCD component is part of the converter and feeding a source follower and a comparator to provide a charge feedback path into the CCD converter and also to provide a resetting signal to a primary charge storage well within the CCD component. The primary charge storage well has a charge capacity corresponding to one-half of the full scale value of the converter. A charge applied to the converter is indicative of the instantaneous value of an analog input signal to the primary charge storage well. A secondary charge storage well is also provided for temporarily storing excess charges which overflow from the primary charge storage area into such secondary storage well.

Abstract: A charge transfer device is provided having a first group of electrodes embedded in a semiconductor material and a second group of electrodes embedded in a contiguous overlying layer electrically insulating material. An improvement in this device includes means for injecting charge into such device having a number of additional components consisting of a first additional electrode which is embedded in-part in the semiconductor material, and a second additional electrode which is embedded in the insulating material. The first additional electrode is energized by a bias voltage and the second additional electrode is energized by a clock signal.