Abstract: A processing system includes an interconnect fabric coupleable to a local memory and at least one compute cluster coupled to the interconnect fabric. The compute cluster includes a processor core and a cache hierarchy. The cache hierarchy has a plurality of caches and a throttle controller configured to throttle a rate of memory requests issuable by the processor core based on at least one of an access latency metric and a prefetch accuracy metric. The access latency metric represents an average access latency for memory requests for the processor core and the prefetch accuracy metric represents an accuracy of a prefetcher of a cache of the cache hierarchy.

Abstract: Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.

Abstract: A processing system rinses, from a cache, those cache lines that share the same memory page as a cache line identified for eviction. A cache controller of the processing system identifies a cache line as scheduled for eviction. In response, the cache controller, identifies additional “dirty victim” cache lines (cache lines that have been modified at the cache and not yet written back to memory) that are associated with the same memory page, and writes each of the identified cache lines to the same memory page. By writing each of the dirty victim cache lines associated with the memory page to memory, the processing system reduces memory overhead and improves processing efficiency.

Abstract: A processing system includes an interconnect fabric coupleable to a local memory and at least one compute cluster coupled to the interconnect fabric. The compute cluster includes a processor core and a cache hierarchy. The cache hierarchy has a plurality of caches and a throttle controller configured to throttle a rate of memory requests issuable by the processor core based on at least one of an access latency metric and a prefetch accuracy metric. The access latency metric represents an average access latency for memory requests for the processor core and the prefetch accuracy metric represents an accuracy of a prefetcher of a cache of the cache hierarchy.

Abstract: A method, system, and processing system for pre-fetching data is disclosed. The method, system, and processing system includes data cache region prefetch circuitry for detecting a first access by a first instruction at a first instruction address to a first memory portion, detecting a first non-sequential access pattern to a set of addresses in the first memory portion, and in response to a miss by a second instruction at the first instruction address, and in response to the non-sequential access pattern occurring, pre-fetching data according to the first non-sequential access pattern.

Abstract: A processing system includes an interconnect fabric coupleable to a local memory and at least one compute cluster coupled to the interconnect fabric. The compute cluster includes a processor core and a cache hierarchy. The cache hierarchy has a plurality of caches and a throttle controller configured to throttle a rate of memory requests issuable by the processor core based on at least one of an access latency metric and a prefetch accuracy metric. The access latency metric represents an average access latency for memory requests for the processor core and the prefetch accuracy metric represents an accuracy of a prefetcher of a cache of the cache hierarchy.

Abstract: Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.

Abstract: A method of monitoring, by one or more cores of a multi-core processor, speculative instructions, where the speculative instructions store data to a shared memory location, and where a semaphore, associated with the memory location, specifies the availability of the memory location to store data. One or more speculative instructions are flushed based on when the semaphore specifies the memory location is unavailable. Any further speculative instructions are suppressed from being issued based on a count of flushed speculation instructions above a specified threshold, executing the speculative instructions when the semaphore specifies the memory location is available, and storing the data to the memory location.

Abstract: A method of monitoring, by one or more cores of a multi-core processor, speculative instructions, where the speculative instructions store data to a shared memory location, and where a semaphore, associated with the memory location, specifies the availability of the memory location to store data. One or more speculative instructions are flushed based on when the semaphore specifies the memory location is unavailable. Any further speculative instructions are suppressed from being issued based on a count of flushed speculation instructions above a specified threshold, executing the speculative instructions when the semaphore specifies the memory location is available, and storing the data to the memory location.

Abstract: A processing system rinses, from a cache, those cache lines that share the same memory page as a cache line identified for eviction. A cache controller of the processing system identifies a cache line as scheduled for eviction. In response, the cache controller, identifies additional “dirty victim” cache lines (cache lines that have been modified at the cache and not yet written back to memory) that are associated with the same memory page, and writes each of the identified cache lines to the same memory page. By writing each of the dirty victim cache lines associated with the memory page to memory, the processing system reduces memory overhead and improves processing efficiency.

Abstract: A processing system includes an interconnect fabric coupleable to a local memory and at least one compute cluster coupled to the interconnect fabric. The compute cluster includes a processor core and a cache hierarchy. The cache hierarchy has a plurality of caches and a throttle controller configured to throttle a rate of memory requests issuable by the processor core based on at least one of an access latency metric and a prefetch accuracy metric. The access latency metric represents an average access latency for memory requests for the processor core and the prefetch accuracy metric represents an accuracy of a prefetcher of a cache of the cache hierarchy.

Abstract: A data cache region prefetcher creates a region when a data cache miss occurs. Each region includes a predetermined range of data lines proximate to each data cache miss and is tagged with an associated instruction pointer register (RIP). The data cache region prefetcher compares subsequent memory requests against the predetermined range of data lines for each of the existing regions. For each match, the data cache region prefetcher sets an access bit and attempts to identify a pseudo-random access pattern based on the set access bits. The data cache region prefetcher increments or decrements appropriate counters to track how often the pseudo-random access pattern occurs. If the pseudo-random access pattern occurs frequently, then the next time a memory request is processed with the same RIP and pattern, the data cache region prefetcher prefetches the data lines in accordance with the pseudo-random access pattern for that RIP.

Abstract: A facility is provided in a telecommunications network which transforms a particular type of telephone call connection, e.g., a connection carrying a call placed to a source of information at the point that it enters the network into a digital network connection extending to the back end of a services platform and interfacing with the called destination. Advantageously, then, a voice connection that is typically established via the telecommunications network to an information source is replaced by an inexpensive digital connection and an information services unit.

Abstract: A steel reinforcement bracket attaches to an aluminum rib of a frame of a dish antenna to relieve the stress causing fatigue in the rib. The bracket is shaped in such a way so as to allow a cradle bracket gripping opposite sides of the rim to form a flat surface against the rib. The reinforcement bracket is secured to the rib and cradle bracket with bolts so as to transfer the stress on the rib to the reinforcement bracket.

Abstract: A multipurpose brick-layer's tool is adaptable for use as brick tongs or as a mortar hoe. In one embodiment of the invention, the tool also functions as a band-cutter for cutting metal bands used in the packaging and transport of bricks. The tool is adjusted using a slide and guide arrangement. A pin and hole adjustment mechanism varies the distance between locking jaws of the multipurpose tool. In this manner, a specific number of bricks can be carried or a hoe handle of preselected length can be formed. An elongated embowed handle arches over the guide tube and has at one end thereof a first clamping jaw. The jaw end portion of the handle is rotatably affixed to a pivot pin extending through opposing walls of the guide tube. A slide tube carried within the guide tube extends outside the guide tube and carries a second clamping jaw complementary to and larger in size than the first clamping jaw. The second clamping jaw is a blade of a size and structure suitable both as a mortar hoe blade and a clamping jaw.

Abstract: Apparatus for manipulating the upper and lower dies of a die set comprising first and second fixtures mounted in laterally spaced relation for movement toward and away from each other. The first fixture has a mechanism providing a die-supporting surface and is in the form of a cradle rockable between a loading position in which its die-supporting surface is generally horizontal and a transfer position in which its die-supporting surface is generally upright and faces the second fixture. The second fixture has a die-supporting surface and also is in the form of a cradle rockable between a transfer position in which its die-supporting surface is generally upright and faces the first fixture and a position in which its die-supporting surface is generally horizontal. Clamps are provided to clamp the lower die of a die set to the die-supporting surface of the first fixture and for clamping the upper die to the die-supporting surface of the second fixture.

Abstract: An apparatus for manipulating the upper and lower dies of a die set comprising a gantry having a fixture mounted on a main frame for up and down movement, and a sub-frame mounted on the fixture for 180.degree. of rotation. Clamping units are mounted on the sub-frame for clamping the upper die to the sub-frame when the fixture is in a lower position at a work-transfer station. The die set is transported on a cart to the work-transfer station where the upper die is clamped to the sub-frame. The fixture is raised to elevate the upper die to an upper position. The cart is moved away from the work-transfer station carrying only the lower die with it. The upper die is inverted, lowered onto a second cart and it, too, is then moved away from the work-transfer station. Both dies now face upwardly for convenient inspection, cleaning and/or repair. The transporter cart table on which the die set is supported can be rotated to any desired angle such as 90.degree.

Abstract: Apparatus and method are provided for spraying a fluid through a first nozzle (48), and more particularly to spraying the vapor of a metallic compound onto glass containers (132), and for cleaning the first nozzle (48) without removing the first nozzle (48) and even without stopping the flow of the fluid being sprayed. The apparatus and method include providing a chamber (76) that is juxtaposed to the inlet (62) of the first nozzle (48), providing a second nozzle (52) whose outlet (68) is disposed inside the chamber (76), and spraying a fluid, preferably air, through the second nozzle (52), into the inlet (62) of the first nozzle (48), and through the first nozzle (48).

Abstract: A method is provided for the manufacture of glass containers (10) of the type having a sidewall (12) and having a bottom (16) that is thicker than the sidewall (12). The method comprises a step in which a centered portion (44) of the bottom (16) is cooled subsequent to the molding step. Cooling the centered portion (44) is effective to develop a reverse strain in the transition portion (42a) of the sidewall (12) that is proximal to the bottom (16). This reverse strain corrects the strain that is induced by unequal cooling of a relatively thin sidewall (12) and a relatively thick bottom (16) and results in a reduction of annealing time.

Abstract: A sink rinsing device including an accelerating nozzle attached by a flexible stem to a fitting which fits onto a sink faucet above the aerator thereof. When not in use, the stem and nozzle lie flat against the underside of the faucet, out of the path of the water emerging from the faucet. When it is desired to rinse the sink, the stem is bent to bring the nozzle underneath the aerator of the faucet. The nozzle is removably fastenable to the fitting to secure the device in this position. Water emerging from the aerator of the faucet can now enter the inlet side of the nozzle, which directs a forceful stream of water against the sides of the sink. The fitting allows the nozzle to be rotated 360 degrees.