Abstract: A temperature compensation circuit converts a control signal (IG) that has an undesirable temperature coefficient to a temperature compensated control signal (I32) having a desirable temperature coefficient. In one embodiment, four transistors (60, 64, 68, and 72) are configured to convert the control signal (IG) having an undesirable temperature coefficient to the temperature compensated control signal (I32) having the desired temperature coefficient. Additional embodiments use components to refine the temperature compensation process.

Abstract: A temperature compensation circuit converts a control signal (IG) that has an undesirable temperature coefficient to a temperature compensated control signal (I32) having a desirable temperature coefficient. In one embodiment, four transistors (60, 64, 68, and 72) are configured to convert the control signal (IG) having an undesirable temperature coefficient to the temperature compensated control signal (I32) having the desired temperature coefficient. Additional embodiments use components to refine the temperature compensation process.

Abstract: An improved logarithmic amplifier (100) and method in which a signal at an output (106) is logarithmic with respect to the voltage supplied at a gain control input (102). The logarithmic amplifier (100) includes a first amplifier stage (110) and a second amplifier stage (130) which are coupled together by a current mirror stage (120). Alternative embodiments of logarithmic amplifier (200) and (300) include different biasing methods for biasing the second amplifier stage (130).

Abstract: A transconductance amplifier (67) includes a multiple-stage amplifier (99) for amplifying an Intermediate Frequency (IF) signal. The transconductance amplifier includes a feedback path (103) having a resistance (105) for providing a feedback signal from an output of the multiple-stage amplifier (99) to an input of the multiple-stage amplifier (99). The resistance (105) of the feedback path (103) is selected so that an input impedance of the transconductance amplifier is equal to a source impedance at an input terminal (82) of the transconductance amplifier (67) and an output impedance of the transconductance amplifier (67) is equal to a load impedance at an output terminal (84) of the transconductance amplifier (67).

Abstract: An integrated receiver circuit (10) has a first amplifier (12) coupled for receiving a radio frequency (RFIN) input signal. A mixer (16) has an RF input coupled to an output of the first amplifier, a local oscillator (LO) input coupled for receiving an LO signal, and an output for providing an intermediate frequency (IF) signal. A second amplifier (20) has an input coupled for receiving the IF signal, and an output for providing a receive signal strength indicator (RSSI) signal representative of an input power level of the receiver signal path. A feedback circuit (22-26 or 72, 78) is coupled between the first output of the second amplifier and a linearity control input of the mixer for controlling linearity of the mixer.

Abstract: A current regulator (60, 90, and 100) provides current regulation. The current regulator (60, 90, and 100) has a bias generator (14) which compares a generated voltage, V.sub.ref, with a feedback voltage generated in accordance with an output current provided in a reference circuit (57, 58, and 59). The current regulator (60, 90, and 100) operates as a bias circuit to minimize the quiescent currents for efficiently providing regulated output currents in current sink circuit (26). The current in the bias generator (14) and the current in the reference circuit (57, 58, and 59) that regulate the output current in current sink circuit (26) are a small percentage of the overall current.

Abstract: An integrator circuit (10) and a method for generating an output signal that is frequency compensated. The integrated circuit (10) includes an input stage (14) coupled to a transconductance amplifier (11) via a capacitor (13) and a compensation diode (12). The compensation diode (12) provides an impedance that negates an output impedance of the transconductance amplifier (11). The output signal of the integrator circuit (10) is determined by the capacitor (13).

Abstract: A base current compensation circuit (10) generates a current that tracks a gain of a transistor (11). The compensation circuit (10) includes a current mirror formed by a mirror transistor (12) and an output transistor (14). The mirror transistor (12) is connected to the transistor (11) whose gain is tracked. A current source (16) and a feedback transistor (13) causes the mirror transistor (12) to draw a base current from the transistor (11) so that a collector current of the transistor (11) matches a reference current. The output transistor (14) amplifies the base current of the transistor (11) to generate the tracking current in the collector electrode of the output transistor (14).

Abstract: A compensation circuit (26, 27, 28, 29) supplies base currents to a plurality of current sources (22, 25) attached to a regulator (50), thereby reducing the load on the regulator and improving overall circuit performance. The compensation circuit measures a single base current, multiplies it by the number of current sources to be supplied, and then provides the multiplied current to a base bus (40) coupled to the bases of the plurality of current sources. The compensation circuit has a very high output impedance with essentially no variation with supply voltage.

Abstract: A variable gain control circuit (10) provides an output signal having a gain dependent on first (34) and second (52) reference current sources. An amplifier circuit (14, 20) generates first and second dynamic control voltages that control current flow through an input stage (30) referenced to the first reference current source. The dynamic control voltages produce similar currents in an output stage (32) referenced to the second reference current source. The dynamic control voltages to the input and output stage allow the variable gain amplifier circuit to operate with low power supply potentials which is especially useful in battery applications.

Abstract: A relaxation oscillator is disclosed which includes first and second currents for charging and discharging a capacitor wherein the slew rate of the dynamic voltages developed at the terminals of the capacitor remain substantially constant for each frequency of operation which desensitizes the oscillator to the effects of the inherent stray capacitance, and improves the accuracy of the output frequency. A circuit monitors the dynamic voltage across the capacitor and inverts a control signal at opposite polarities of a particular threshold. A bistable circuit provides first and second complementary output signals in response to the control signal from the circuit. The first and second complementary output signals drive a pair of switching transistors which alternate the direction of current flowing through the capacitor so as to provide smooth voltage transitions at the terminals of the capacitor.

Abstract: A current source regulator is responsive to an enable signal and provides at least one output current of predetermined magnitude proportional to absolute temperature. The enable signal biases a first transistor for supplying current through its collector-emitter conduction path to the common base of a string of PNP transistors, the latter of which provide the output current. The current flowing in one of the PNP transistors flows through a regulating feedback circuit, the output of which regulates the base voltage of the first transistor to control the base voltage of the PNP transistors for maintaining the current flowing through the regulating feedback circuit at the predetermined value proportional to absolute temperature.

Abstract: An FM demodulator circuit uses an oscillator to provide a switch control signal synchronized to an FM signal, and a current supply to provide differentially alternating currents at first and second outputs flowing through a commutator circuit to the first and second outputs of the FM demodulator circuit. The commutator circuit is responsive to the switch control signal for alternately switching the first and second outputs of the current supply between the first and second outputs of the FM demodulator circuit thereby providing an alternating current flowing in the first and second outputs of the FM demodulator circuit which has an average value over each half cycle of the switch control signal proportional to the deviation of the frequency of the FM signal from the free-running frequency of the oscillator.

Abstract: An FM detection circuit utilizes a first multiplier and phase shift circuit to demodulate an FM signal. The output signal also contains harmonic distortion as a result of the demodulation process. A gain control circuit is included to provide a first gain control signal to the first multiplier which adjusts the magnitude of the output signal of the FM detection circuit in such a manner as to substantially eliminate the harmonic distortion. The gain control circuit uses a second multiplier to generate an output signal proportional to the square of the output signal of the phase shift circuit which is then compared to a constant current to produce an error signal proportional to the harmonic distortion. The error signal controls the magnitude of the first gain control signal such that the output signal of the FM detection circuit is proportional to the deviation of the FM signal from its center frequency.

Abstract: An amplifier comprising a plurality of stacked current mirrors, each having an input and a common terminal, provides an output amplified current in response to receiving an input current at first and second inputs. A current source supplies a direct current to the input of the first one of the current mirrors while the input and the common terminal is also coupled to the first and second inputs of the amplifier. The common terminal of each preceding current mirror is coupled to the input of the next proceeding current mirror whereby the sum of the input and output currents of the preceding amplifier is sourced to the input of the proceeding current mirror. An output of the last one of the plurality of current mirrors is coupled to the output of the amplifier.

Abstract: An integrated circuit for providing a regulated output current comprises an output transistor for producing the output current, a feedback circuit including a current mirror for sensing the magnitude of the output current and providing a feedback current proportional thereto and a driver circuit for comparing the feedback current to an externally generated current and biasing the output transistor accordingly to regulate the magnitude of the output current to a predetermined value. Preferably, the external current is generated through an external resistor coupled to an input of the driver curcuit and the current mirror wherein the magnitude of the external current is directly proportional to a reference voltage provided on chip and applied to an additional input of the driver circuit the latter of which functions as an operational amplifier.

Abstract: A circuit and method for limiting the current through a transistor that is driven from a preceding amplifier stage. The circuit comprises an additional transistor having the base and emitter thereof connected to the base and emitter of the transistor whose current is to be limited. A current source is supplied to the collector of the additional transistor which transistor becomes saturated when a limiting threshold is reached as the magnitude of the drive current supplied to the bases of the two transistors exceeds a value wherein the current source can not supply the collector current required by the additional transistor.

Abstract: An output load circuit having a non-linear transfer characteristic is coupled to the differential output of a conventional quadrature detector which produces a more linear version of the S-curve characteristics of the detector. The load circuit comprises differentially connected transistors each having their collector-emitter paths coupled to respective outputs of the multiplied portion of the quadrature demodulator wherein the non-linear differential output signal therefrom drives the non-linear transfer function of the base-emitter junction of the differentially coupled transistors to produce a linear output voltage at the base thereof.

Abstract: A circuit and method for producing a signal the magnitude of which varies with the logarithm of an input signal supplied to a plurality of cascaded differential amplifier stages each having substantially equal gain. As particular ones of the stages go into limiting the DC rectified voltage produced at the differential common node of each of the stages is detected to produce a plurality of currents. These currents are summed to the input of a current turn-around circuit which produces the signal at an output.

Abstract: A circuit and method for producing a signal that is nearly a perfect full wave rectified version of an applied alternating signal. The circuit comprises first and second identical non-linear symmetrical rectifiers each having a respective output coupled to a current mirror circuit. In response to the alternating signal being applied to the input of the first rectifier a full wave rectified signal is produced at the output thereof to drive the current mirror such that at the output thereof, which is coupled to the output of the second rectifier, there appears a signal identical to the output from the first rectifier. This signal is utilized to produce an input signal to the second rectifier to constrain the output signal therefrom to be identical to the output signal from the current mirror circuit. The input signal to the second rectifier is thus a perfect full wave rectified version of the input signal applied to the first rectifier.