Patents by Inventor William E. O'Mara, Jr.

William E. O'Mara, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making silicon MESFET for dielectrically isolated integrated circuits
    Patent number: 5306650
    Abstract: A MESFET wherein a Schottky top gate which extends across the channel region between the source and drain regions and beyond sides of the dielectric isolation in which the device is built at two points. The bottom gate also extends beyond the dielectric isolation below the surface of the island and intersects the bottom of the source and drain regions. Where a bottom gate contact region forms an annulus encompassing the source and drain, the top gate extends across the channel and only onto sides of the bottom gate contact region at two points. The source and drain regions which are formed are sufficiently spaced from the dielectric isolation so as not to effect the I.sub.DSS resulting from variation in the island size.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: April 26, 1994
    Assignee: Harris Corporation
    Inventors: William E. O'Mara, Jr., James D. Beasom
  • Method of isolating a top gate of a MESFET and the resulting device
    Patent number: 5107312
    Abstract: A MESFET including a Schottky top gate which extends across the channel region between the source and drain regions and beyond two opposed sides of the dielectric isolation onto the substrate in which the device is built. The portion of the top gate which extends across the channel is disconnected from the portion which extends across the substrate beyond the dielectric isolation. This may result from the removal of the gate material at the dielectric isolation or by the portion of the gate material which is on the dielectric isolation being vertically displaced and disconnected or discontinous from the portion of the gate material which extends across the channel and that portion which extends across the substrate.
    Type: Grant
    Filed: March 12, 1991
    Date of Patent: April 21, 1992
    Assignee: Harris Corporation
    Inventors: William E. O'Mara, Jr., James D. Beasom
  • Polycrystalline silicon ohmic contacts to group III-arsenide compound semiconductors
    Patent number: 5027187
    Abstract: A polycrystalline silicon layer forms an Ohmic contact to a group III-arsenide compound semiconductor substrate by heating the substrate. The polysilicon contact out-diffuses silicon into the substrate to form an N++ region.
    Type: Grant
    Filed: November 6, 1990
    Date of Patent: June 25, 1991
    Assignee: Harris Corporation
    Inventors: William E. O'Mara, Jr., Gregory A. Schrantz
  • MESFET for dielectrically isolated integrated circuits
    Patent number: 5014108
    Abstract: A MESFET wherein a Schottky top gate which extends across the channel region between the source and drain regions and beyond sides of the dielectric isolation in which the device is built at two points. The bottom gate also extends beyond the dielectric isolation below the surface of the island and intersects the bottom of the source and drain regions. Where a bottom gate contact region forms an annulus encompassing the source and drain, the top gate extends across the channel and only onto sides of the bottom gate contact region at two points. The source and drain regions which are formed are sufficiently spaced from the dielectric isolation so as not to effect the I.sub.DSS resulting from variation in the island size.
    Type: Grant
    Filed: May 15, 1990
    Date of Patent: May 7, 1991
    Assignee: Harris Corporation
    Inventors: William E. O'Mara, Jr., James D. Beasom
  • Method of isolating a top gate of a MESFET and the resulting device
    Patent number: 4929568
    Abstract: A MESFET including a Schottky top gate which extends across the channel region between the source and drain regions and beyond two opposed sides of the dielectric isolation onto the substrate in which the device is built. The portion of the top gate which extends across the channel is disconnected from the portion which extends across the substrate beyond the dielectric isolation. This may result from the removal of the gate material at the dielectric isolation or by the portion of the gate material which is on the dielectric isolation being vertically displaced and disconnected or discontinuous from the portion of the gate material which extends across the channel and that portion which extends across the substrate.
    Type: Grant
    Filed: September 11, 1989
    Date of Patent: May 29, 1990
    Assignee: Harris Corporation
    Inventors: James D. Beasom, William E. O'Mara, Jr.
  • Dielectric for laser trimming
    Patent number: 4839711
    Abstract: The thickness of the dielectric material of an integrated circuit on top of which is provided a semiconductor layer, is selected to be an integer multiple of one-half the wavelength of the laser light in the dielectric material in order to make the dielectric material layer invisible to the laser-trimming light.
    Type: Grant
    Filed: January 13, 1989
    Date of Patent: June 13, 1989
    Assignee: Harris Corporation
    Inventor: William E. O'Mara, Jr.
  • Dielectric for laser trimming
    Patent number: 4708747
    Abstract: The thickness of the dielectric material of an integrated circuit on top of which is provided a semiconductor layer, is selected to be an integer multiple of one-half the wavelength of the laser light in the dielectric material in order to make the dielectric material layer invisible to the laser-trimming light.
    Type: Grant
    Filed: October 16, 1986
    Date of Patent: November 24, 1987
    Assignee: Harris Corporation
    Inventor: William E. O'Mara, Jr.