Patents by Inventor William E. Snelling

William E. Snelling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Analog and digital audio alignment in the HD radio exciter engine (exgine)
    Patent number: 10484115
    Abstract: An apparatus comprises a digital input port configured to receive digital audio packets of main program service (MPS) audio; a modem operatively coupled to the digital port; an analog input port configured to receive an audio engineer society format (AES) audio signal that is a digitized version of the analog signal component of the frequency modulation (FM) hybrid radio signal; and an alignment unit configured to time-align the AES audio signal with the digital audio packets at the modem; wherein the modem is configured to generate the FM hybrid radio signal using the digital audio packets and the time-aligned AES audio signal.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: November 19, 2019
    Assignee: Ibiquity Digital Corporation
    Inventors: Russell Iannuzzelli, Adam Horowitz, Jeffrey R Detweiler, William E. Snelling
  • ANALOG AND DIGITAL AUDIO ALIGNMENT IN THE HD RADIO EXCITER ENGINE (EXGINE)
    Publication number: 20190253163
    Abstract: An apparatus comprises a digital input port configured to receive digital audio packets of main program service (MPS) audio; a modem operatively coupled to the digital port; an analog input port configured to receive an audio engineer society format (AES) audio signal that is a digitized version of the analog signal component of the frequency modulation (FM) hybrid radio signal; and an alignment unit configured to time-align the AES audio signal with the digital audio packets at the modem; wherein the modem is configured to generate the FM hybrid radio signal using the digital audio packets and the time-aligned AES audio signal.
    Type: Application
    Filed: August 22, 2018
    Publication date: August 15, 2019
    Inventors: Russell Iannuzzelli, Adam Horowitz, Jeffrey R. Detweiler, William E. Snelling
  • Guild array multiplier for binary numbers in two's complement notation
    Patent number: 4706210
    Abstract: The invention concerns a Guild array multiplier for two's complement notation. Three major cell types are used as building blocks in the array, the cells differing by a simple carry circuit only.
    Type: Grant
    Filed: December 13, 1984
    Date of Patent: November 10, 1987
    Assignee: The Johns Hopkins University
    Inventors: William E. Snelling, John E. Penn