Patents by Inventor William E. Werther

William E. Werther has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5791552
    Abstract: A method of solder bumping is provided which consists of: (1) applying a mask to a first substrate, (2) forming a well within the mask around a pad on the first substrate, (3) placing the solder within the well to from a depression, (4) mating a solder bump located on a second substrate with a solder depression in the well, and (5) reflowing the solder to form a pillar which interconnects the first and second substrates. Furthermore, the method may include the step of removing the mask.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: August 11, 1998
    Inventor: William E. Werther
  • Patent number: 5712768
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: January 27, 1998
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5683256
    Abstract: An integral thru-hole contact is provided for solderless connection of a pin inserted therein. The integral contact provides for an interconnect board of extremely low profile for interconnection with an IC package or sockets or pin grid array sockets and may provide for power/ground decoupling or voltage conversion and upgrading of microprocessors.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: November 4, 1997
    Assignee: Methode Electronics, Inc.
    Inventor: William E. Werther
  • Patent number: 5625944
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 6, 1997
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5515241
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 7, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5513076
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 30, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5481435
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: January 2, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5481436
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed. The interconnect board can have layers assigned to specific voltages, in a power-translation design.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: January 2, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5479319
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: December 26, 1995
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 4750092
    Abstract: An interconnecting package for attaching electronic devices, such as semiconductor chips, to an interconnection board and processes for the production and mounting thereof. The interconnection package comprises a multiplicity of metallic leads or pins aligned in a regular array and a first substrate of molded plastic material around the metallic leads or pins with the metallic leads or pins extending through the first substrate. A conductive pattern is formed on a surface, the conductive pattern being adapted to electrically connect to the electronic device, and the conductive pattern extends into a multiplicity of recesses. Each of said metallic leads or pins extends into a corresponding recess and makes an electrical connection to the conductive pattern within the recess.
    Type: Grant
    Filed: October 20, 1986
    Date of Patent: June 7, 1988
    Assignee: Kollmorgen Technologies Corporation
    Inventor: William E. Werther