Patents by Inventor William F. Edwards
William F. Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250254835Abstract: The present disclosure is generally directed to a vertical line card configuration with cage assemblies mounted perpendicular to a printed circuit board with an application specific integrated circuit. The cage assembly may include a plurality of pluggable modules arranged in a belly-to-belly configuration. In this configuration, a first pluggable module having an internal heatsink on bottom may be arranged in vertical alignment with a similar but inverted module where the internal heatsink is on top by virtue of the inversion. The vertical cage structure may include riding heatsinks on opposing edges parallel to the internal heatsinks in the pluggable modules. The cage structure may also have a 2×n cage design, including two cage rows of pluggable modules and any number of columns of module pairs.Type: ApplicationFiled: February 5, 2024Publication date: August 7, 2025Inventors: Melody Liu, William F. Edwards, JR., Tanya Liu, Cedric Fung Lam, Ayan Majumdar
-
Patent number: 12353340Abstract: The disclosure provides for high bandwidth processing through the sharing of memory dies over a plurality of computing dies via an optical interchange. The optical interchange may be configured so as to operate as both an optical switch and optical demultiplexer. The optical switch configuration for the optical interchange allows for data to be written from any computing die to one of a plurality of memory dies via an optical connection. The optical demultiplexer configuration allows for data to be broadcast from a memory die to a plurality of the computing dies.Type: GrantFiled: July 18, 2023Date of Patent: July 8, 2025Assignee: Google LLCInventors: Horia Alexandru Toma, Zuowei Shen, William F. Edwards, Jr., Gurushankar Rajamani, Hong Liu, Ilyas Mohammed
-
Publication number: 20250102746Abstract: The technology generally relates to high bandwidth memory (HBM) packages and processor packages that have optical connectivity. Disclosed systems and methods herein allow for HBM dies that are interconnected with an optical interface in a manner that allows for compact, high-performance computing. An HBM package can be cooled using a cooling unit that is distinct from the processor package. In addition, the cooling unit can be configured so as to provide thermal contact with a subset of high-power components within the HBM package.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Inventors: Horia Alexandru Toma, Zuowei Shen, Ilyas Mohammed, Yingying Wang, William F. Edwards, Jr.
-
Publication number: 20250028661Abstract: The disclosure provides for high bandwidth processing through the sharing of memory dies over a plurality of computing dies via an optical interchange. The optical interchange may be configured so as to operate as both an optical switch and optical demultiplexer. The optical switch configuration for the optical interchange allows for data to be written from any computing die to one of a plurality of memory dies via an optical connection. The optical demultiplexer configuration allows for data to be broadcast from a memory die to a plurality of the computing dies.Type: ApplicationFiled: July 18, 2023Publication date: January 23, 2025Inventors: Horia Alexandru Toma, Zuowei Shen, William F. Edwards, JR., Gurushankar Rajamani, Hong Liu, Ilyas Mohammed
-
Publication number: 20240290763Abstract: A pluggable processor module includes a microprocessor package, a voltage regulator including a capacitor board, and contact pads that each include a first side in contact with the microprocessor package and a second side in contact with the capacitor board.Type: ApplicationFiled: May 9, 2024Publication date: August 29, 2024Inventors: Houle Gan, Richard Stuart Roy, Yujeong Shim, William F. Edwards, JR., Chenhao Nan
-
Patent number: 12002795Abstract: A pluggable processor module includes a microprocessor package, a voltage regulator including a capacitor board, and contacts that each include a first side in contact with the microprocessor package and a second side in contact with the capacitor board. An assembly includes the pluggable processor module and a printed circuit board assembly (“PCBA”) including a module aperture that is large enough to receive the power board and narrower than the capacitor board.Type: GrantFiled: April 13, 2022Date of Patent: June 4, 2024Assignee: Google LLCInventors: Houle Gan, Richard Stuart Roy, Yujeong Shim, William F. Edwards, Jr., Chenhao Nan
-
Publication number: 20230335928Abstract: An assembly includes a printed circuit board (“PCB”). An aperture extends through the PCB. The assembly also includes an array of pins and a processor package. The array of pins extends around a perimeter of the aperture, and the processor package extends over the aperture. The processor package is pressed against the array of pins by a compressive force couple.Type: ApplicationFiled: April 18, 2022Publication date: October 19, 2023Inventors: William F. Edwards, JR., Xu Zuo, Ryohei Urata, Melanie Beauchemin, Woon-Seong Kwon, Shinnosuke Yamamoto, Houle Gan, Yujeong Shim
-
Publication number: 20230335541Abstract: A pluggable processor module includes a microprocessor package, a voltage regulator including a capacitor board, and contact pads that each include a first side in contact with the microprocessor package and a second side in contact with the capacitor board.Type: ApplicationFiled: April 13, 2022Publication date: October 19, 2023Inventors: Houle Gan, Richard Stuart Roy, Yujeong Shim, William F. Edwards, JR., Chenhao Nan
-
Publication number: 20230244046Abstract: Heat dissipation and electric shielding techniques and apparatuses are disclosed to enable the operation of OSFP modules at higher bandwidths. OSFP compatible techniques are discussed including the use of water cooling, addition of heat pipes, use of intercoolers, air-fins and air-foils, optimization of cooling fins, use of vapor chambers are discussed.Type: ApplicationFiled: April 6, 2023Publication date: August 3, 2023Inventors: William F. Edwards, JR., Melanie Beauchemin, Timothy Conrad Lee, Federico Pio Centola, Madhusudan K. Iyengar, Michael Chi Kin Lau, Zuowei Shen, Justin Sishung Lee
-
Patent number: 11650384Abstract: Heat dissipation and electric shielding techniques and apparatuses are disclosed to enable the operation of OSFP modules at higher bandwidths. OSFP compatible techniques are discussed including the use of water cooling, addition of heat pipes, use of intercoolers, air-fins and air-foils, optimization of cooling fins, use of vapor chambers are discussed.Type: GrantFiled: February 9, 2022Date of Patent: May 16, 2023Assignee: Google LLCInventors: William F. Edwards, Jr., Melanie Beauchemin, Timothy Conrad Lee, Federico Pio Centola, Madhusudan K. Iyengar, Michael Chi Kin Lau, Zuowei Shen, Justin Sishung Lee
-
Publication number: 20220269019Abstract: Heat dissipation and electric shielding techniques and apparatuses are disclosed to enable the operation of OSFP modules at higher bandwidths. OSFP compatible techniques are discussed including the use of water cooling, addition of heat pipes, use of intercoolers, air-fins and air-foils, optimization of cooling fins, use of vapor chambers are discussed.Type: ApplicationFiled: February 9, 2022Publication date: August 25, 2022Inventors: William F. Edwards, JR., Melanie Beauchemin, Timothy Conrad Lee, Federico Pio Centola, Madhusudan K. Iyengar, Michael Chi Kin Lau, Zuowei Shen, Justin Sishung Lee
-
Patent number: 11249264Abstract: Heat dissipation and electric shielding techniques and apparatuses are disclosed to enable the operation of OSFP modules at higher bandwidths. OSFP compatible techniques are discussed including the use of water cooling, addition of heat pipes, use of intercoolers, air-fins and air-foils, optimization of cooling fins, use of vapor chambers are discussed.Type: GrantFiled: December 15, 2020Date of Patent: February 15, 2022Assignee: Google LLCInventors: William F. Edwards, Jr., Melanie Beauchemin, Timothy Conrad Lee, Federico Pio Centola, Madhusudan K. Iyengar, Michael Chi Kin Lau, Zuowei Shen, Justin Sishung Lee
-
Publication number: 20220003946Abstract: Heat dissipation and electric shielding techniques and apparatuses are disclosed to enable the operation of OSFP modules at higher bandwidths. OSFP compatible techniques are discussed including the use of water cooling, addition of heat pipes, use of intercoolers, air-fins and air-foils, optimization of cooling fins, use of vapor chambers are discussed.Type: ApplicationFiled: December 15, 2020Publication date: January 6, 2022Inventors: William F. Edwards, Jr., Melanie Beauchemin, Timothy Conrad Lee, Federico Pio Centola, Madhusudan K. Iyengar, Michael Chi Kin Lau, Zuowei Shen, Justin Sishung Lee
-
Patent number: 11044834Abstract: An apparatus includes a housing having a bottom surface and one or more mounting members that enable the housing to be mounted in a rack. The apparatus includes liquid cooling components mounted within the housing. The liquid cooling components include tubing within which a coolant may be communicated, and a heat exchange component that thermally couples a heat load within the housing to the coolant so that heat from the heat load is transferred to the coolant. The bottom surface of the housing defines a drain path. The heat exchange component is positioned in a downward direction of gravity relative to the heat load when the housing is mounted in the rack. In the event of a coolant leak, the coolant leak will occur beneath the heat load and the coolant will flow away from the heat load and exit the housing by use of the drain path.Type: GrantFiled: February 21, 2020Date of Patent: June 22, 2021Assignee: Google LLCInventors: Michael Chi Kin Lau, William F. Edwards, Jr., Justin S. Lee, Winnie Leung
-
Patent number: 10522280Abstract: The subject disclosure relates to improved integrated connector module (ICM) designs for Ethernet applications. Some aspects provide an improved integrated connector module transformer (ICMt), including a wafer configured to hold a plurality of toroid elements, wherein the wafer is comprised of two or more mechanically coupled wafer portions. The ICMt can include one or more Electro Magnetic Interference (EMI) fingers that are configured to contact a ground pad of a printed circuit board (PCB) in order to provide a low-inductance connection between the ICMt and the ground pad of the PCB.Type: GrantFiled: January 17, 2017Date of Patent: December 31, 2019Assignee: CISCO TECHNOLOGY, INC.Inventors: William F. Edwards, George Edward Curtis, Ki Yuen Chau, Sandeep Arvindkumar Patel, Keith Frank Tharp, Robin Carol Johnson, Yu Liu, Billie Alton Hudson
-
Publication number: 20170125149Abstract: The subject disclosure relates to improved integrated connector module (ICM) designs for Ethernet applications. Some aspects provide an improved integrated connector module transformer (ICMt), including a wafer configured to hold a plurality of toroid elements, wherein the wafer is comprised of two or more mechanically coupled wafer portions. The ICMt can include one or more Electro Magnetic Interference (EMI) fingers that are configured to contact a ground pad of a printed circuit board (PCB) in order to provide a low-inductance connection between the ICMt and the ground pad of the PCB.Type: ApplicationFiled: January 17, 2017Publication date: May 4, 2017Inventors: William F. Edwards, George Edward Curtis, Ki Yuen Chau, Sandeep Arvindkumar Patel, Keith Frank Tharp, Robin Carol Johnson, Yu Liu, Billie Alton Hudson
-
Patent number: 9576716Abstract: The subject disclosure relates improved common mode choke (CMC) and integrated connector module (ICM) designs for Ethernet applications. Some aspects provide an improved CMC component, including an upper chassis element having a first plurality of comb structures vertically protruding from an edge of the upper chassis element, and a lower chassis element comprising a second plurality of comb structures vertically protruding from an edge of the lower chassis element, the second plurality of comb structures configured to interlock with the first plurality of comb structures to form an enclosure when the upper chassis element is mechanically coupled with the lower chassis element.Type: GrantFiled: December 24, 2013Date of Patent: February 21, 2017Assignee: CISCO TECHNOLOGY, INCInventors: William F. Edwards, George Edward Curtis, Ki Yuen Chau, Sandeep Arvindkumar Patel, Keith Frank Tharp, Robin Carol Johnson, Yu Liu, Billie Alton Hudson
-
Publication number: 20150179328Abstract: The subject disclosure relates improved common mode choke (CMC) and integrated connector module (ICM) designs for Ethernet applications. Some aspects provide an improved CMC component, including an upper chassis element having a first plurality of comb structures vertically protruding from an edge of the upper chassis element, and a lower chassis element comprising a second plurality of comb structures vertically protruding from an edge of the lower chassis element, the second plurality of comb structures configured to interlock with the first plurality of comb structures to form an enclosure when the upper chassis element is mechanically coupled with the lower chassis element.Type: ApplicationFiled: December 24, 2013Publication date: June 25, 2015Inventors: William F. Edwards, George Edward Curtis, Ki Yuen Chau, Sandeep Arvindkumar Patel, Keith Frank Tharp, Robin Carol Johnson, Yu Liu, Billie Alton Hudson
-
Patent number: 7625240Abstract: A connector comprising an insulating body defining a slot that is adapted to receive a pluggable module. A plurality of conductive pins extend into the slot and at least one extension, coupled to the insulating body, protects the plurality of pins from being shorted by an incorrectly inserted pluggable module.Type: GrantFiled: October 26, 2007Date of Patent: December 1, 2009Assignee: Cisco Technology, Inc.Inventors: Perry L. Hayden, Sr., Peter Lum, William F. Edwards, Jr., Flintstone Yu
-
Patent number: 7620754Abstract: A carrier module is physically compatible with a XENPAK/X2 10 GE slot and includes a socket for accepting a non-XENPAK/X2 module and interface circuitry for providing appropriate signals to a XENPAK/X2 70-pin connector on an interior side of the carrier module. The carrier module includes a cookie, accessible by host software, identifying the type of carrier module and non-XENPAK/X2 module accepted by the carrier card.Type: GrantFiled: March 25, 2005Date of Patent: November 17, 2009Assignee: Cisco Technology, Inc.Inventors: Alan Yee, Eric Wiles, James P. Rivers, Sandeep Arvind Patel, William F. Edwards, Jr., Jeffrey Provost