Patents by Inventor William F. Heagerty

William F. Heagerty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4418402
    Abstract: A bistable solid-state device, substantially immune to long term, low level radiation comprises, in combination with memory storage elements, means comprising P-type devices responsive to enabling and disabling signals for conducting signals to and from the memory storage elements only during the presence of read and write signals, and which are substantially immune to the effects of long term, low level radiation, thereby substantially increasing the reliability of solid-state memory cells. Also provided are means for generating a control signal having first and second levels and logic means responsive to said control signals of a first level to generate and supply said enabling signal to said P-type device and further responsive to said control signal of a second level to generate and supply said disabling signal to said P-type device. Sensing means for sensing the state of said bistable memory elements during a time period between successive level changes of said control signals is also provided.
    Type: Grant
    Filed: May 13, 1981
    Date of Patent: November 29, 1983
    Assignee: RCA Corporation
    Inventors: William F. Heagerty, Gerald T. Caracciolo, William F. Gehweiler
  • Patent number: 4284958
    Abstract: A folded-cascode amplifier arrangement includes first and second transistors of complementary conductivity type and a constant current generator for supplying quiescent current thereto. Signal current flowing in the first transistor is coupled to the second transistor through current steering at the interconnection between their main conduction paths. Signal current flowing in the first transistor is further coupled to the input circuit of a current mirror amplifier (CMA), the output current of which is proportional to the signal current and is coupled to the main conduction path of the second transistor. The output current of the CMA is poled for reinforcing the current flow of the second transistor so that the output current available from the folded-cascode configuration is substantially greater than the signal current in the first transistor. The amplifier voltage-gain transfer function exhibits a frequency response dominated by a single pole.
    Type: Grant
    Filed: November 13, 1979
    Date of Patent: August 18, 1981
    Assignee: RCA Corporation
    Inventors: Richard L. Pryor, William F. Heagerty
  • Patent number: 4284959
    Abstract: A folded-cascode amplifier arrangement includes first and second transistors of complementary conductivity type and a constant current generator for supplying quiescent current thereto. Signal current flowing in the first transistor is coupled to the second transistor through current steering at the interconnection between their main conduction paths. The load means for the second transistor includes a cascode-connected third transistor for supplying load current thereto, which third transistor substantially increases the resistance of the load for correspondingly increasing the voltage gain of the amplifier arrangement. The amplifier voltage gain transfer function exhibits a frequency response dominated by a single pole.
    Type: Grant
    Filed: November 13, 1979
    Date of Patent: August 18, 1981
    Assignee: RCA Corporation
    Inventors: William F. Heagerty, Richard L. Pryor