Abstract: The present invention relates to the application of a force to enhance the performance of an electrochemical cell. The force may comprise, in some instances, an anisotropic force with a component normal to an active surface of the anode of the electrochemical cell. In the embodiments described herein, electrochemical cells (e.g., rechargeable batteries) may undergo a charge/discharge cycle involving deposition of metal (e.g., lithium metal) on a surface of the anode upon charging and reaction of the metal on the anode surface, wherein the metal diffuses from the anode surface, upon discharging. The uniformity with which the metal is deposited on the anode may affect cell performance. For example, when lithium metal is redeposited on an anode, it may, in some cases, deposit unevenly forming a rough surface. The roughened surface may increase the amount of lithium metal available for undesired chemical reactions which may result in decreased cycling lifetime and/or poor cell performance.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: A method of making a matrix material with particular mechanical and/or physical properties, including providing a mixture of micro and/or nano particle and a cored wire as a feed stock, and physically incorporating the micro and/or nano particles into the cored wire to thereby produce the matrix material. Such method could also include the physical incorporation of the micro and/or nano particles into the cored wire being accomplished using a continuous forming process to thoroughly mix the micro and/or nano particles to thereby produce a dispersion mixture of particles and/or a drawing process through successive dies to process the matrix material. An elongated material is also disclosed, having an exterior portion including a matrix material and a core material generally surrounded by the exterior portion and having particles including one or more micro particles, nano particles, macro or nano matrix material particles and/or a second matrix material.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for implementing masked write commands are disclosed herein. An example apparatus may include a memory bank, a local buffer circuit, and an address control circuit. The local buffer circuit may be associated with the memory bank. The address control circuit may be coupled to the memory bank and configured to receive a command and an address associated with the command. The address control circuit may include a global buffer circuit configured to store the address. The address control circuit may further be configured to delay the command using one of a plurality of command paths based, at least in part, on a write latency and to provide the address stored in the global buffer circuit to the local buffer circuit to be stored therein.

Abstract: A method of spacing a plurality of electrical conductors for carrying electrical current in an electrical machine may include positioning between the electrical conductors an uncured spacer body. The uncured spacer body may include a curable material, and an activatable heat generating material mixed with the curable material. The method may further include activating the activatable heat generating material to heat the curable material to form a cured spacer to thereby space the electrical conductors in the electrical machine.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: Apparatuses and methods for implementing masked write commands are disclosed herein. An example apparatus may include a memory bank, a local buffer circuit, and an address control circuit. The local buffer circuit may be associated with the memory bank. The address control circuit may be coupled to the memory bank and configured to receive a command and an address associated with the command. The address control circuit may include a global buffer circuit configured to store the address. The address control circuit may further be configured to delay the command using one of a plurality of command paths based, at least in part, on a write latency and to provide the address stored in the global buffer circuit to the local buffer circuit to be stored therein.

Abstract: Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to a digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided.

Abstract: Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines whether a target row of memory associated with the target row address is a primary or a redundant row of memory. The predecoder is further configured to cause one or more rows of memory physically adjacent the primary row of memory to be refreshed if the primary row is the target row or one or more rows of memory physically adjacent the redundant row of memory to be refreshed if the redundant row of memory is the target row of memory.

Abstract: A method of spacing a plurality of electrical conductors for carrying electrical current in an electrical machine may include positioning between the electrical conductors an uncured spacer body. The uncured spacer body may include a curable material, and an activatable heat generating material mixed with the curable material. The method may further include activating the activatable heat generating material to heat the curable material to form a cured spacer to thereby space the electrical conductors in the electrical machine.

Abstract: A method of spacing a plurality of electrical conductors for carrying electrical current in an electrical machine may include positioning between the electrical conductors an uncured spacer body. The uncured spacer body may include a curable material, and an activatable heat generating material mixed with the curable material. The method may further include activating the activatable heat generating material to heat the curable material to form a cured spacer to thereby space the electrical conductors in the electrical machine.

Abstract: A patient bed drive mechanism, under control of a processor, is capable of continuously moving a patient bed through the a TOF-PET detector array having a stationary field of view (FOV) for a distance in excess of the physical extent of an axis of the array FOV. A direct memory access (DMA) rebinner card is coupled to the detector array to receive therefrom a stream of TOF-PET coincidence event data during the extent of movement of the bed. Image projection data are generated in real time from the acquired stream of TOF-PET coincidence event data via the DMA card.

Abstract: A method of manufacturing specialized alloys having specific properties and an alloy made using this method. The methods involve the use of micro and/or nano-sized particles that are mixed into an alloy using a friction stir welding method. The micro and/or nano-sized particles are used to alter one or more characteristics of the alloy in the locations in which the micro and/or nano-sized particles are added. The micro and/or nano-sized particles may be metal particles, non-metal particles, or a combination thereof.