Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.

Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.

Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.

Abstract: Disclosed is a Sleeve Stop Lock that is a portable, removable, non-damaging door lock that can be used to secure almost any inward swinging door from the outside. The apparatus consists of three components: a sleeve, a stop, and a lock. The “sleeve” component fits around the edge of a door. It is installed while a door is open. With the door closed, the “stop” makes contact with the door frame once attached to the sleeve thus preventing the door from swinging inward. The “lock” mechanism then securely binds all of the components together. The combination of these three elements (sleeve, stop and lock) prevent potential intruders (including housekeeping) from entering and invading the privacy of an unoccupied room.

Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.

Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.

Abstract: In some aspects, an apparatus for encoding data for transmission by a transmitter device to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to a first cryptographic scheme, a first cipher directive, a first cryptographic key operation, and/or a first cryptographic key length, that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.

Abstract: In some aspects, an apparatus for encoding a stream of data for transmission to a receiver device comprises a memory device and a hardware processor. The memory device is a memory device configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter identifying one or more cipher directives from a plurality of cipher directives including an exclusive-OR (XOR) function and a table lookup function. The hardware processor is configured to generate, for transmission to the receiver device, a frame comprising a first field identifying a custom or non-custom cryptographic scheme and a second field identifying a first cipher directive of the plurality of cipher directives.

Abstract: In some aspects, an apparatus for encoding data for transmission to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to one or more of a first cryptographic scheme, a first cryptographic key operation, and a first cryptographic key length that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.

Abstract: WOSPP (WorkOut with Snaps and Palm Protection) is an alternative workout glove design that is compact in size, fits around one or more fingers, is machine washable/dryable, and can be attached to an article of clothing such as workout shorts, or other items such as a workout towel. The WOSPP attaches to the various articles or other items through a variety of methods, such as snaps. When the article of clothing or other item is washed, the WOSPP is also cleaned. A portion of the WOSPP design provides palm protection against calluses in addition to grip support.

Abstract: In some aspects, an apparatus for encoding a stream of data for transmission to a receiver device comprises a memory device and a hardware processor. The memory device is a memory device configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter identifying one or more cipher directives from a plurality of cipher directives including an exclusive-OR (XOR) function and a table lookup function. The hardware processor is configured to generate, for transmission to the receiver device, a frame comprising a first field identifying a custom or non-custom cryptographic scheme and a second field identifying a first cipher directive of the plurality of cipher directives.

Abstract: In some aspects, an apparatus for encoding data for transmission by a transmitter device to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to a first cryptographic scheme, a first cipher directive, a first cryptographic key operation, and/or a first cryptographic key length, that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.

Abstract: In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.

Abstract: In some aspects, an apparatus for encoding data for transmission to a receiver device having an initial common cryptographic key with the apparatus comprises a memory device and a hardware processor. The memory device is configured to store a plurality of parameters associated with a plurality of cryptographic protocols, the plurality of parameters comprising the initial common cryptographic key. The hardware processor is configured to generate a frame comprising a plurality of fields defining instructions related to one or more of a first cryptographic scheme, a first cryptographic key operation, and a first cryptographic key length that are derived from the plurality of parameters for use in a subsequent communication session with the receiver device.

Abstract: Some examples describe a first helical electromagnetic coil of a transformer. In some instances, at least a portion of the first helical electromagnetic coil is inside a first semi-conductive substrate. Further, in some examples, the first helical electromagnetic coil has a shape with an internal space. Further, some examples describe a second helical electromagnetic coil of the transformer. In some instances, at least a portion of the second helical electromagnetic coil is nested within the internal space of the first helical electromagnetic coil. Further, in some examples, the at least the portion of the second electromagnetic coil is inside the first semi-conductive substrate.

Abstract: Some examples describe a first helical structure of an electromagnetic inductor coil. In some examples, at least a portion of the first helical structure of the electromagnetic inductor coil is inside a first substrate. Further, some examples describe a second helical structure of the electromagnetic inductor coil. In some instances, at least a portion of the second helical structure is nested within the first helical structure of the electromagnetic inductor coil. Further, in some examples, the at least the portion of the second helical structure is inside the first substrate.

Abstract: Serializer-deserializer (SERDES) and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate. The first and second SERDES dies positioned adjacent, in a plane, and disposed on the package substrate. The logic circuit communicatively connected to the SERDES circuit and to the package substrate. The logic die stacked vertically and disposed on the first and second SERDES dies. A method of assembling a SERDES and integrated circuit package including providing a SERDES structure selected from a menu of SERDES die and SERDES circuit combinations. A design structure of a SERDES and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate.

Abstract: Serializer-deserializer (SERDES) and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate. The first and second SERDES dies positioned adjacent, in a plane, and disposed on the package substrate. The logic circuit communicatively connected to the SERDES circuit and to the package substrate. The logic die stacked vertically and disposed on the first and second SERDES dies. A method of assembling a SERDES and integrated circuit package including providing a SERDES structure selected from a menu of SERDES die and SERDES circuit combinations. A design structure of a SERDES and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate.

Abstract: Serializer-deserializer (SERDES) and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate. The first and second SERDES dies positioned adjacent, in a plane, and disposed on the package substrate. The logic circuit communicatively connected to the SERDES circuit and to the package substrate. The logic die stacked vertically and disposed on the first and second SERDES dies. A method of assembling a SERDES and integrated circuit package including providing a SERDES structure selected from a menu of SERDES die and SERDES circuit combinations. A design structure of a SERDES and integrated circuit package including a package substrate, first and second SERDES dies having a SERDES circuit, and a logic die having a logic circuit. The SERDES circuit communicatively connected to the package substrate.