Abstract: An assembly couples first and second backplanes together. The first backplane is configured to carry first electrical backplane signals among a first set of circuit boards. The second backplane is configured to carry second electrical backplane signals among a second set of circuit boards. The assembly includes a first switch configured to convey at least some of the first electrical backplane signals between circuit boards of the first set of circuit boards. The assembly further includes a second switch configured to convey at least some of the second electrical backplane signals between circuit boards of the second set of circuit boards. The assembly further includes a fiber optic cable joining the first and second switches together. The first and second switches are configured to exchange fiber optic signals through the fiber optic cable thus forming a cohesive backplane interconnect system between the first and second sets of circuit boards.

Abstract: A storage processor particularly suited to RAID systems provides high throughput for applications such as streaming video data. An embodiment is configured as an ASIC with a high degree of parallelism in its interconnections. Buffering may be used to maintain clear paths for priority data, such as user data being read or written, on shared channels.

Abstract: A storage processor for a block storage RAID array services disk storage block requests from one or more hosts. At its heart, a application specific integrated chip (ASIC) supports a store and forward data transfer regime in that host to disk transfers are made by placing data in storage processor memory under control of the storage processor, operated on by the ASIC, and sent to the disk array. Efficient handling of ordering is, preferably, provided by hardware logic-based masking of interrupts and by other mechanisms. Embodiments help to insure that shared data paths are flushed of non-critical data quickly to sustain more critical data, for example, that required to sustain high throughput.