Abstract: An integrated circuit testing device, such as an ATE, configured with an architecture comprising a distinct software layer and a distinct hardware layer with an interface for tester abstraction providing a communication conduit between the software layer and the hardware layer. The software layer communicates in device under test terms whereas the hardware layer communicates in the terms of the testing apparatus. Various communication interface points are provided to the software and hardware layers, as well as the interface for tester abstraction.

Abstract: An integrated circuit testing device, such as an ATE, configured with an architecture comprising a distinct software layer and a distinct hardware layer with an interface for tester abstraction providing a communication conduit between the software layer and the hardware layer. The software layer communicates in device under test terms whereas the hardware layer communicates in the terms of the testing apparatus. Various communication interface points are provided to the software and hardware layers, as well as the interface for tester abstraction.

Abstract: Method and apparatus for circuit testing with ring-connected test instrument modules. A system for controlling one or more test instruments to test one or more integrated circuits includes a master clock and a controller. The test instruments are connected to form a communication ring. The master clock is connected to each test instrument and provides a clock signal to the one or more test instruments. The controller is connected to the communication ring and is configured to align counters of test instruments to derive a common clock time value from the clock signal. The controller is further configured to generate and send data words into the communication ring to carry the data words to each test instrument. The data words includes at least one data word specifying a test event to be performed, a common clock time value, and at least one of the test instruments.

Abstract: A system and method for linking and loading compiled pattern data is described. In one embodiment, the method includes stepping through a pattern object to identify a shared resource and a compiled value or address for the shared resource and determining a reconciled value or address for the shared resource. The method also includes the steps of generating a composite load image containing a representation of the shared resource and the reconciled value or address and generating a remap table containing a mapping of the compiled value or address to the reconciled value or address.

Abstract: A method for linking compiled pattern data and loading the data into tester hardware includes the steps of generating a composite object that includes a shared resource, determining a local shared resource specific to a test instrument that is associated with the shared resource in the composite object, assigning a local reconciled value or address to the local shared resource, and loading the local shared resource into the test instrument.

Abstract: An integrated circuit testing device, such as an ATE, configured with an architecture comprising a distinct software layer and a distinct hardware layer with an interface for tester abstraction providing a communication conduit between the software layer and the hardware layer. The software layer communicates in device under test terms whereas the hardware layer communicates in the terms of the testing apparatus. Various communication interface points are provided to the software and hardware layers, as well as the interface for tester abstraction.

Abstract: Method and apparatus for circuit testing with ring-connected test instrument modules. A system for controlling one or more test instruments to test one or more integrated circuits includes a master clock and a controller. The test instruments are connected to form a communication ring. The master clock is connected to each test instrument and provides a clock signal to the one or more test instruments. The controller is connected to the communication ring and is configured to align counters of test instruments to derive a common clock time value from the clock signal. The controller is further configured to generate and send data words into the communication ring to carry the data words to each test instrument. The data words includes at least one data word specifying a test event to be performed, a common clock time value, and at least one of the test instruments.

Abstract: Method and apparatus for circuit testing with ring-connected test instrument modules. A system for controlling one or more test instruments to test one or more integrated circuits includes a master clock and a controller. The test instruments are connected to form a communication ring. The master clock is connected to each test instrument and provides a clock signal to the one or more test instruments. The controller is connected to the communication ring and is configured to align counters of test instruments to derive a common clock time value from the clock signal. The controller is further configured to generate and send data words into the communication ring to carry the data words to each test instrument. The data words includes at least one data word specifying a test event to be performed, a common clock time value, and at least one of the test instruments.