Patents by Inventor William G. Lomelino

William G. Lomelino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110258520
    Abstract: Disclosed is a method and system of determining a data block of a RAID level 6 stripe that has corrupted or incorrect data. For each data block of the stripe, a reconstructed data block is created using the other data blocks and the P syndrome data block. The reconstructed data block and the other data blocks are used to create a new Q syndrome data block. The new Q syndrome data block and the stored Q syndrome data block are compared. If the new Q syndrome data block and the stored Q syndrome data block match, the data block is marked as being suspected as having corrupted or incorrect data. This process is repeated for every data block in the stripe. If there is only a single suspected data block, the reconstructed data block is stored as a replacement of the suspect data block in the stripe.
    Type: Application
    Filed: April 16, 2010
    Publication date: October 20, 2011
    Inventors: Theresa L. Segura, Ashish Batwara, William G. Lomelino
  • Publication number: 20110202728
    Abstract: Methods and systems for assuring persistence of battery backed cache memory in a storage system comprising multiple virtual machines. In one exemplary embodiment, an additional process is added to the storage controller that senses the loss of power and copies the entire content of the cache memory including portions used by each of the multiple virtual machines to a nonvolatile persistent storage that does not rely on the battery capacity of the storage system. In another exemplary embodiment, the additional process calls a plug-in procedure associated with each of the virtual machines to permit the virtual machine to assure that the content of its portion of the cache memory is consistent before the additional process copies the cache memory to nonvolatile memory. The additional process may be integrated with the hypervisor or may be operable as a separate process in yet another virtual machine.
    Type: Application
    Filed: February 17, 2010
    Publication date: August 18, 2011
    Applicant: LSI CORPORATION
    Inventors: Charles E. Nichols, Mohamad H. El-Batal, Martin Jess, Keith W. Holt, William G. Lomelino