Patents by Inventor William Gregg
William Gregg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11946861Abstract: This disclosure relates to methods of characterizing a urine sample from a subject.Type: GrantFiled: August 2, 2021Date of Patent: April 2, 2024Assignee: Genotox LaboratoriesInventors: Nicholas D. Laude, William S. Edgemond, Keqin Gregg
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Patent number: 11595320Abstract: Electronic communications received via a network from a plurality of electronic devices may include signals of device interactions or data changes that correspond to process performances by process-performing resources, signals of conditions of loads, or signals of processes associated with the process-performing resources and the loads. Data composites may be formed from the electronic communications, with data portions collected and mapped to resource profile records and load profile records that may be updated with the collected data portions. For each load, at least one of the one or more resource profile records and/or the one or more load profile records may be used to map the process-performing resources to the load. Content nodes may be linked in a network of content nodes, including respective linked content, resource specifications or load specifications. Access to the network of content nodes may be allowed via a control interface.Type: GrantFiled: June 30, 2021Date of Patent: February 28, 2023Assignee: C/HCA, Inc.Inventors: William Gregg, Annabaker Garber, Aaron Montlary, Louis Davis
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Patent number: 11417759Abstract: According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.Type: GrantFiled: June 6, 2019Date of Patent: August 16, 2022Assignee: General Electric CompanyInventors: Stephen Daley Arthur, Joseph Darryl Michael, Tammy Lynn Johnson, David Alan Lilienfeld, Kevin Sean Matocha, Jody Alan Fronheiser, William Gregg Hawkins
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Patent number: 11146599Abstract: Systems, methods, and machine-readable storage media for processing data streams in accordance with protocols to selectively transmit content to endpoint devices to facilitate conferencing are disclosed. Electronic communications may be received, via one or more networks, from endpoint devices, segregated, and routed to facilitate conferencing environments. Listening for data changes in data streams may be performed, each data stream corresponding to a particular source. Data changes that are generated based on events may be detected and mapped to a particular load identifier and a particular conferencing environment. A conferencing protocol may be identified and mapped to the particular conferencing environment. Consequent to determining that the data changes correspond to the one or more, the particular conferencing environment may be updated.Type: GrantFiled: February 4, 2020Date of Patent: October 12, 2021Assignee: C/HCA, Inc.Inventors: Edmund Jackson, Cody Hall, William Gregg, Jim Jirjis, William Rice, Warren Sadler, Igor Ges, Annabaker Garber
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Patent number: 10937869Abstract: The subject matter disclosed herein relates to wide band gap semiconductor power devices and, more specifically, to high-energy implantation masks used in forming silicon carbide (SiC) power devices, such as charge balanced (CB) SiC power devices. An intermediate semiconductor device structure includes a SiC substrate layer having a first conductivity type and silicon carbide (SiC) epitaxial (epi) layer having the first conductivity type disposed on the SiC substrate layer. The intermediate device structure also includes a silicon high-energy implantation mask (SiHEIM) disposed directly on a first portion of the SiC epi layer and having a thickness between 5 micrometers (?m) and 20 ?m. The SiHEIM is configured to block implantation of the first portion of the SiC epi layer during a high-energy implantation process having an implantation energy greater than 500 kiloelectron volts (keV).Type: GrantFiled: September 28, 2018Date of Patent: March 2, 2021Assignee: GENERAL ELECTRIC COMPANYInventors: William Gregg Hawkins, Reza Ghandi, Christopher Bauer, Shaoxin Lu
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Publication number: 20200105879Abstract: The subject matter disclosed herein relates to wide band gap semiconductor power devices and, more specifically, to high-energy implantation masks used in forming silicon carbide (SiC) power devices, such as charge balanced (CB) SiC power devices. An intermediate semiconductor device structure includes a SiC substrate layer having a first conductivity type and silicon carbide (SiC) epitaxial (epi) layer having the first conductivity type disposed on the SiC substrate layer. The intermediate device structure also includes a silicon high-energy implantation mask (SiHEIM) disposed directly on a first portion of the SiC epi layer and having a thickness between 5 micrometers (?m) and 20 ?m. The SiHEIM is configured to block implantation of the first portion of the SiC epi layer during a high-energy implantation process having an implantation energy greater than 500 kiloelectron volts (keV).Type: ApplicationFiled: September 28, 2018Publication date: April 2, 2020Inventors: William Gregg Hawkins, Reza Ghandi, Christopher Bauer, Shaoxin Lu
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Publication number: 20190363183Abstract: According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.Type: ApplicationFiled: June 6, 2019Publication date: November 28, 2019Inventors: Stephen Daley Arthur, Joseph Darryl Michael, Tammy Lynn Johnson, David Alan Lilienfeld, Kevin Sean Matocha, Jody Alan Fronheiser, William Gregg Hawkins
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Patent number: 10367089Abstract: According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.Type: GrantFiled: March 27, 2012Date of Patent: July 30, 2019Assignee: GENERAL ELECTRIC COMPANYInventors: Stephen Daley Arthur, Joseph Darryl Michael, Tammy Lynn Johnson, David Alan Lilienfeld, Kevin Sean Matocha, Jody Alan Fronheiser, William Gregg Hawkins
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Patent number: 9931362Abstract: The present invention relates to a composition for controlling fish. In particular, the composition may be an incitant, functioning as either a fish attractant or a fish repellent. The composition may be prepared by extracting bacteria from a source fish, culturing the bacteria in an appropriate media, and subsequently combining the cultured bacteria with a substrate to form the composition.Type: GrantFiled: June 3, 2015Date of Patent: April 3, 2018Inventor: Kenneth William Gregg
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Publication number: 20170299017Abstract: A fabric layer includes a fabric and a crosslinkable elastomer, where the fabric defines a first side and the crosslinkable elastomer defines an opposing side. The fabric is coated with a crosslinkable elastomer and the combination is molded into a multiple tooth shaped fabric layer. In some aspects, the first side is an inner surface void of the crosslinkable elastomer. In some cases, the crosslinkable elastomer is crosslinked while the fabric layer is molded, while in some other cases, the crosslinkable elastomer is surface cured while the fabric layer is molded. The crosslinkable elastomer may be an alloy of crosslinkable polyethylene and EPDM. The fabric layer may be used as an outer layer of a synchronous drive belt, a timing belt, a poly-v belt, or offset tooth belt.Type: ApplicationFiled: April 19, 2016Publication date: October 19, 2017Applicant: ContiTech Antriebssysteme GmbHInventors: Michael John William Gregg, Benjamin William Roberts, Jeffrey Dwight Lofgren
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Publication number: 20150265659Abstract: The present invention relates to a composition for controlling fish. In particular, the composition may be an incitant, functioning as either a fish attractant or a fish repellent. The composition may be prepared by extracting bacteria from a source fish, culturing the bacteria in an appropriate media, and subsequently combining the cultured bacteria with a substrate to form the composition.Type: ApplicationFiled: June 3, 2015Publication date: September 24, 2015Inventor: Kenneth William Gregg
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Patent number: 9078458Abstract: The present invention relates to a composition for controlling fish. In particular, the composition may be an incitant, functioning as either a fish attractant or a fish repellent. The composition may be prepared by extracting bacteria from a source fish, culturing the bacteria in an appropriate media, and subsequently combining the cultured bacteria with a substrate to form the composition.Type: GrantFiled: March 5, 2010Date of Patent: July 14, 2015Inventor: Kenneth William Gregg
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Publication number: 20140332144Abstract: The present invention is directed to timing belts having improved fabric adhesion to the tooth facing which can be achieved by the use of a combination of a RFL treated fabric and an EPDM body provided the RFL treatment or the body include ZDA or the RF latex is an X-HNBR latex.Type: ApplicationFiled: July 22, 2014Publication date: November 13, 2014Applicant: VEYANCE TECHNOLOGIES, INC.Inventors: Thomas George Burrowes, Michael John William Gregg
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Patent number: 8795456Abstract: The present invention is directed to timing belts having improved fabric adhesion to the tooth facing which can be achieved by the use of a combination of a RFL treated fabric and an EPDM body provided the RFL treatment or the body include ZDA or the RF latex is an X-HNBR latex.Type: GrantFiled: February 10, 2011Date of Patent: August 5, 2014Assignee: Veyance Technologies, Inc.Inventors: Thomas George Burrowes, Michael John William Gregg
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Publication number: 20130075756Abstract: According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.Type: ApplicationFiled: March 27, 2012Publication date: March 28, 2013Applicant: GENERAL ELECTRIC COMPANYInventors: Stephen Daley Arthur, Joseph Darryl Michael, Tammy Lynn Johnson, David Alan Lilienfeld, Kevin Sean Matocha, Jody Alan Fronheiser, William Gregg Hawkins
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Patent number: 8377812Abstract: The present invention provides a method of fabricating a metal oxide semiconductor field effect transistor. The method includes the steps of forming a source region on a silicon carbide layer and annealing the source region. A gate oxide layer is formed on the source region and the silicon carbide layer. The method further includes providing a gate electrode on the gate oxide layer and disposing a dielectric layer on the gate electrode and the gate oxide layer. The method further includes etching a portion of the dielectric layer and a portion of the gate oxide layer to form sidewalls on the gate electrode. A metal layer is disposed on the gate electrode, the sidewalls and the source region. The method further includes forming a gate contact and a source contact by subjecting the metal layer to a temperature of at least about 800° C. The gate contact and the source contact comprise a metal silicide. The distance between the gate contact and the source contact is less than about 0.6 ?m.Type: GrantFiled: June 12, 2009Date of Patent: February 19, 2013Assignee: General Electric CompanyInventors: Kevin Sean Matocha, Gregory Keith Dudoff, William Gregg Hawkins, Zachary Matthew Stum, Stephen Daley Arthur, Dale Marius Brown
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Patent number: 8030404Abstract: The present invention is directed to the incorporation of functionalized polyethylenes, in amount of about 1% to 95% by weight based upon the weight of the total crosslinkable material, into ethylene alpha olefin elastomers, such as EPDM elastomer compositions, which are crosslinked by peroxides, which results in improved properties, such as hardness and modulus of elongation, and can result in improved higher abrasion resistance, wear resistance, coefficient of friction, tensile strength, and other properties through a broad temperature range, which are beneficial to power transmission products, such as power transmission belts.Type: GrantFiled: January 20, 2010Date of Patent: October 4, 2011Assignee: Veyance Technologies, Inc.Inventors: Thomas George Burrowes, Michael John William Gregg
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Publication number: 20110126964Abstract: The present invention is directed to timing belts having improved fabric adhesion to the tooth facing which can be achieved by the use of a combination of a RFL treated fabric and an EPDM body provided the RFL treatment or the body include ZDA or the RF latex is an X-HNBR latex.Type: ApplicationFiled: February 10, 2011Publication date: June 2, 2011Applicant: VEYANCE TECHNOLOGIES, INC.Inventors: Thomas George Burrowes, Michael John William Gregg
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Publication number: 20100226876Abstract: The present invention relates to a composition for controlling fish. In particular, the composition may be an incitant, functioning as either a fish attractant or a fish repellent. The composition may be prepared by extracting bacteria from a source fish, culturing the bacteria in an appropriate media, and subsequently combining the cultured bacteria with a substrate to form the composition.Type: ApplicationFiled: March 5, 2010Publication date: September 9, 2010Inventor: Kenneth William Gregg
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Patent number: D723716Type: GrantFiled: May 2, 2013Date of Patent: March 3, 2015Inventor: William Gregg Imus