Abstract: Embodiments of apparatuses, methods, and systems for a radio frequency (RF) amplifier with a beta correction block are generally described herein. In some embodiments, the beta correction block may be configured relative to an output stage so that a variation in a beta of the output stage is tracked by a corresponding variation of a reference provided by the beta correction block. Other embodiments may be described and claimed.

Abstract: An apparatus and method is disclosed for providing control of current consumption of a power amplifier. The power amplifier comprises an output stage for amplifying a RF signal, and the output stage is operably coupled to an output load. The power amplifier further comprises a bias circuit operably coupled to the output stage, wherein the bias circuit is capable of applying a bias voltage to the output stage. The power amplifier still further comprises a limit circuit operably coupled to the bias circuit for detecting an increase in the current of the output stage under an output load mismatch and in response, decreasing the bias voltage applied to the output stage.

Abstract: A constant current bias circuit and associated method is disclosed. The constant current bias circuit comprises an output stage for amplifying a radio frequency (RF) signal, wherein the output stage is operably coupled with a voltage. The constant current bias circuit further comprises a bias circuit operably coupled with the output stage for generating a substantially constant current bias to the output stage. The constant current bias circuit still further comprises a plurality of bias transistors operably coupled with the voltage and the output stage.

Abstract: An apparatus and method is disclosed for providing a mirror circuit for detecting a change in current of a RF power amplifier. The mirror circuit includes a voltage operably coupled with the mirror circuit, a bias circuit operably coupled with the mirror circuit, wherein the bias circuit is capable of applying a bias voltage to the mirror circuit, and an output reference signal. The output reference signal is proportional to the change of current in the RF power amplifier.

Abstract: An apparatus and method is disclosed for providing a mirror circuit for detecting a change in current of a RF power amplifier. The mirror circuit includes a voltage operably coupled with the mirror circuit, a bias circuit operably coupled with the mirror circuit, wherein the bias circuit is capable of applying a bias voltage to the mirror circuit, and an output reference signal. The output reference signal is proportional to the change of current in the RF power amplifier.

Abstract: A constant current bias circuit and associated method is disclosed. The constant current bias circuit comprises an output stage for amplifying a radio frequency (RF) signal, wherein the output stage is operably coupled with a voltage. The constant current bias circuit further comprises a bias circuit operably coupled with the output stage for generating a substantially constant current bias to the output stage. The constant current bias circuit still further comprises a plurality of bias transistors operably coupled with the voltage and the output stage.

Abstract: An apparatus and method is disclosed for providing control of current consumption of a power amplifier. The power amplifier comprises an output stage for amplifying a RF signal, and the output stage is operably coupled to an output load. The power amplifier further comprises a bias circuit operably coupled to the output stage, wherein the bias circuit is capable of applying a bias voltage to the output stage. The power amplifier still further comprises a limit circuit operably coupled to the bias circuit for detecting an increase in the current of the output stage under an output load mismatch and in response, decreasing the bias voltage applied to the output stage.

Abstract: A light-emitting device includes a GaAs substrate, a light-emitting structure disposed above the substrate and capable of emitting light having a wavelength of about 1.3 microns to about 1.55 microns, and a buffer layer disposed between the substrate and the light-emitting structure. The composition of the buffer layer varies through the buffer layer such that a lattice constant of the buffer layer grades from a lattice constant approximately equal to a lattice constant of the substrate to a lattice constant approximately equal to a lattice constant of the light-emitting structure. The light-emitting device exhibits improved mechanical, electrical, thermal, and optical properties compared to similar light-emitting devices grown on InP substrates.

Abstract: Two transistors are coupled in a cascode topology between a load resistor and a first current source. A third transistor is coupled between the cascode transistor output terminal and a second current source. The current provided by the second current source causes a constant voltage drop across the load resistor and consequently a steady offset voltage at the cascode transistor output terminal. When the control transistor in the cascode circuit switches on, the current provided by the first current source provides an additional voltage drop at the cascode transistor output terminal.

Abstract: A light-emitting device includes a GaAs substrate, a light-emitting structure disposed above the substrate and capable of emitting light having a wavelength of about 1.3 microns to about 1.55 microns, and a buffer layer disposed between the substrate and the light-emitting structure. The composition of the buffer layer varies through the buffer layer such that a lattice constant of the buffer layer grades from a lattice constant approximately equal to a lattice constant of the substrate to a lattice constant approximately equal to a lattice constant of the light-emitting structure. The light-emitting device exhibits improved mechanical, electrical, thermal, and optical properties compared to similar light-emitting devices grown on InP substrates.

Abstract: A buffer includes two pairs of push-pull configured transistors as output drivers. One transistor in the first push-pull pair is controlled by an input signal and the second transistor in the first push-pull pair is controlled via a current mirror by a complement of the input signal. Similarly, one transistor in the second push-pull pair is controlled by the complement of the input signal and the second transistor in the second push-pull pair is controlled via another current mirror by the input signal.

Abstract: A source-coupled oscillator contains two main MESFETs which supply current to respective loads and which have sources connected through a capacitor. Each of the main MESFETs is supplied with a constant current which can be adjusted to vary the frequency of the oscillator. The output signals are derived from the voltage across the loads. The oscillator also contains two differential pairs of MESFETs that change state as the main MESFETs are turned on and off and are connected so as to switch current into one or the other of the loads. Each of the differential pairs is supplied with a constant current. The currents supplied by the differential pairs act as compensating currents and are adjusted so that when the currents through the two main MESFETs are changed to vary the frequency of the oscillator, the total current through the loads remains constant.

Abstract: A source-coupled oscillator contains two main MESFETs which supply current to respective loads and which have sources connected through a capacitor. Each of the main MESFETs is supplied with a constant current which can be adjusted to vary the frequency of the oscillator. The output signals are derived from the voltage across the loads. The oscillator also contains two differential pairs of MESFETs that change state as the main MESFETs are turned on and off and are connected so as to switch current into one or the other of the loads. Each of the differential pairs is supplied with a constant current. The currents supplied by the differential pairs act as compensating currents and are adjusted so that when the currents through the two main MESFETs are changed to vary the frequency of the oscillator, the total current through the loads remains constant.

Abstract: A multiplexer includes a first input device that receives a first input signal and a first select signal. When the first select signal has a first state, the first input device generates a first voltage at a first node in response to the first input signal. When the first select signal has a second state, the first input device generates a first reference voltage at the first node. A second input device receives a second input signal and a second select signal related to the first select signal. When the second select signal has a first state, the second input device generates a second voltage at a second node in response to the second input signal. When the second select signal has a second state, the second input device generates a second reference voltage at the second node. A first output buffer has an input terminal coupled to the first node and an output terminal coupled to an output node.

Abstract: A logic circuit output stage includes a first transistor with a first terminal that receives the first logic output signal and a third terminal coupled to a first output node. A second transistor has a first terminal coupled to the first terminal of the first transistor. A third transistor has a first terminal that receives the second logic output signal and a third terminal coupled to a second output node. A fourth transistor has a first terminal coupled to a third terminal of the second transistor and a second terminal coupled to the second output node. An impedance is connected between the third terminal of the second transistor and the first output node. In this output stage, the second transistor provides a transient signal to the first terminal of the fourth transistor in response to a transition in the first logic output signal. The fourth transistor provides a temporary change in the current flowing through the second output node in response to the transient signal received from the second transistor.

Abstract: An integrating phase detector includes a phase comparator and an integrating load impedance. The phase comparator is a voltage-input, current-output logic gate such as a OR/NOR gate, or a XOR/XNOR gate having first and second inputs for comparing the phase of first and second input signals. The current output of the logic gate provides an output current pulse proportional to the phase difference between the first and second input signals. The integrating load such as a passive resistor-capacitor network is coupled to the current output of the phase detector for directly integrating the current pulse and providing a DC voltage proportional to the phase difference between the first and second input signals. The minimum pulse width of the output current pulse is substantially limited only by the fT of the devices used in the logic gate.

Abstract: An apparatus and method for improving the bit error rate of multiplexed signals in a multiplexer system includes independently controlling two types of timing errors. The first type of timing error is related to the timing of transitions between alternating portions of the multiplexed output signal. The second type of timing error is related to the amplitude of the crossing points of the multiplexed signal portions. Varying the duty cycle of the clock signal to the multiplexer controls the transition between the alternating portions of the multiplexed output signal, and adding a voltage offset between single-ended components of the multiplexed output signal controls the amplitude of the crossing points between the one/zero and zero/one transitions of the multiplexed outut signal. The two types of timing errors are controlled with two separate control voltage ports that are independently and continuously variable in order to achieve the optimum bit error rate.

Abstract: A wide bandwidth push-pull parallel amplifier cicuit is provided that includes a main amplifier stage and a parallel stage comprising a transimpedance amplifier and a follower circuit. Both amplifier stage inputs are coupled to the amplifier circuit's input terminals. The output from the main amplifier stage is coupled to the input of the follower circuit. The output of the follower is summed with the output of the transimpedance amplifier to provide a voltage output. The gain bandwidth product of the amplifier circuit is improved beyond that of a single stage while maintaining the delay of a single stage.

Abstract: An integrated logic circuit comprises a direct coupled FET logic input stage and a super buffer logic output stage. The input stage comprises a depletion-mode FET having its drain connected to a first reference potential level and having its gate and source connected together, and a first enhancement mode FET structure having its drain connected to the source of the depletion-mode FET, its source connected to a second, lower reference potential level and having at least one gate connected to receive an input logical signal. The super buffer logic output stage comprises a second enhancement mode FET structure that is essentially identical to the first enhancement mode FET structure, the source of the second enhancement mode FET structure being connected to the second reference potential level and the gate of the second enhancement mode FET structure being connected to the gate of the first enhancement mode FET structure.

Abstract: A programmable oscillator includes first and second transistors having their emitters coupled by a capacitor, and a pair of current sources coupling respective transistors to ground. A switching means is provided having a first state coupling the collector of the first transistor to the base of the second transistor and coupling the collector of the second transistor to the base of the first transistor, and a second state coupling the collectors of the first and second transistors to ground such that when the switching means is in the first state, the first and second transistors switch on and off in alternating fashion, and when the switching means is in the second state the first and second transistors remain on continuously.