Abstract: A semiconductor wafer is tested by heating an electrical contact to a temperature sufficient to desorb water vapor and/or organic material from a surface thereof. The semiconductor wafer is also heated to a temperature sufficient to desorb water vapor and/or organic material from a top surface thereof. The heated surface of the contact is caused to touch the heated top surface of the semiconductor wafer. An electrical stimulus is applied between the heated surface of the contact and the heated top surface of the semiconductor wafer when the surface of the contact is touching the top surface of the semiconductor wafer. A response of the semiconductor wafer to the applied electrical stimulus is measured and at least one electrical property of the semiconductor wafer is determined from the measured response.

Abstract: A method of measuring at least one electrical property of a semiconductor wafer includes providing an elastically deformable and electrically conductive contact having an insulative oxide layer formed on an exterior surface thereof by a controlled oxidation process, such as, without limitation, thermal oxidation, anodic oxidation or deposition oxidation. A first electrical contact is formed between the oxide layer on the surface of the contact and a dielectric layer overlaying a top surface of the semiconductor wafer and a second electrical contact is formed with the semiconductor wafer. A CV type stimulus is applied between the first electrical contact and the second electrical contact. A response of the semiconductor wafer to the CV type stimulus is measured and at least one electrical property of the dielectric layer, the semiconductor wafer or both is determined from the response.

Abstract: A current-voltage response of at least one site of a semiconductor wafer where ions have been implanted in the semiconducting material of the semiconductor wafer is measured prior to annealing the semiconductor wafer. From the measured response, a determination is made whether the ion implantation is within acceptable tolerance(s).

Abstract: To determine a concentration of defects and/or impurities in a semiconductor wafer, a first value of current is caused to flow in the semiconductor wafer having a substrate of semiconducting material. The semiconductor wafer is exposed to a pulse of light whereupon electron-hole pairs generated in the semiconductor wafer in response to the light pulse cause the current to increase to a second value. After termination of the light pulse, the rate of change of the current from the second value toward the first value is determined. A concentration of defects and/or impurities in the semiconductor wafer is determined as a function of the rate of change.

Abstract: A method of processing a semiconductor wafer includes utilizing a heated gas to heat at least one part of a semiconductor wafer by convection whereupon at least one contaminant is desorbed therefrom. A stream of cooling gas is caused to pass over the one part of the semiconductor wafer in the absence of heated gas to cool the one part of the semiconductor wafer. A metrology tool is then caused to measure at least one part of the semiconductor wafer to determine at least one characteristic thereof.

Abstract: In an apparatus and method for determining a permittivity of a dielectric layer on a semiconductor wafer, a thickness of the dielectric layer is determined and a topside of the wafer is moved into contact with a spherical portion of an at least partially spherical and electrically conductive surface. An electrical stimulus is applied between the electrically conductive surface and the semiconducting material. A capacitance of a capacitor comprised of the electrically conductive surface, the semiconductor material and the dielectric layer is determined from the applied stimulus. A permittivity of the dielectric layer is then determined as a function of the capacitance and the thickness of the dielectric layer.

Abstract: In a method of measuring at least one electrical property of a semiconductor wafer, an elastically deformable conductive contact formed from an electrically conductive coating overlaying an electrically conductive base material is provided. The base material has a first work function and the coating has a second work function. A first electrical contact is formed between the conductive contact and a top surface of a semiconductor wafer. A second electrical contact is formed with the semiconductor wafer. An electrical stimulus is applied between the first and second electrical contacts and a response of the semiconductor wafer to the electrical stimulus is measured. At least one electrical property of the semiconductor wafer is determined from the response.

Abstract: To remove and/or prevent contamination of a probe, at least a portion of the probe is positioned in a chamber having an inlet passage and an outlet passage, with a distal end of the probe extending through the outlet passage and terminating on a side thereof opposite the chamber. A gas is caused to flow through the inlet passage into the chamber and out the outlet passage, thereby modifying an environment surrounding the distal end of the probe. The gas may be heated prior to injection.

Abstract: To detect soft breakdown of a dielectric layer of a semiconductor wafer, a DC current is caused to flow between a top surface of the dielectric layer and the semiconducting material of the semiconductor wafer. The DC current is either a constant value DC current, or a DC current that swept and/or stepped from a first value toward a second value in a manner whereupon the electric field and, hence, a DC voltage induced across the dielectric layer increases as the DC current approaches the second value. The response of the semiconductor wafer to the flow of DC current is measured for the presence of an AC voltage component superimposed on the DC voltage. The value of the DC voltage induced across the dielectric layer where the AC voltage component is detected is designated as the soft breakdown voltage of the dielectric layer.

Abstract: A sample chuck for supporting sample semiconductor wafers during testing includes an upper layer formed from a semiconducting material laminated to a lower layer formed from a conducting material.