Patents by Inventor William H. Kao

William H. Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8327300
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: December 4, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Patent number: 7865858
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: January 4, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Publication number: 20080148212
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Application
    Filed: February 4, 2008
    Publication date: June 19, 2008
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Patent number: 7328419
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: February 5, 2008
    Assignee: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Patent number: 7287324
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: October 30, 2007
    Assignee: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Patent number: 7231624
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: June 12, 2007
    Assignee: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Publication number: 20040098688
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 20, 2004
    Applicant: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Publication number: 20040098393
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 20, 2004
    Applicant: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Publication number: 20040098674
    Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 20, 2004
    Applicant: Cadence Design Systems, Inc.
    Inventors: Thanh Vuong, William H. Kao, David C. Noice
  • Patent number: 5768479
    Abstract: A method for generating a physical integrated circuit layout, using the similarity between a template and the physical layout as a metric. This automated template-driven layout methodology creates a physical integrated circuit layout which approximates the specified template as closely as practicably possible. The similarity of the positioning of circuit elements in a physical layout is improved with regard to the positioning of those same circuit elements in a template. The circuit elements' placement is incrementally improved by attaching a cost to each placement, with a lower cost reflecting a better match between circuit element placement in the physical layout and the template. Fuzzy logic concepts are employed to determine the cost of a given layout.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: June 16, 1998
    Assignee: Cadence Design Systems, Inc.
    Inventors: George J. Gadelkarim, Ted Vucurevich, William H. Kao