Patents by Inventor William Haines

William Haines has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8468370
    Abstract: A variety of data storage devices, methods and systems are implemented for control of memory associated with backup functionality. One such data storage device includes a power circuit that provides main power. The data storage device has a first solid-state memory circuit that maintains data in the absence of electrical power. A second memory circuit is subject to data loss in the absence of electrical power. A storage circuit stores energy and provides the stored energy to the second memory circuit in response to a loss of main power. A test circuit discharges a portion of the stored energy to provide output data indicative of power-providing capabilities of the storage circuit. A memory controller controls data transfers to the data storage device by temporarily storing data destined for the first solid-state memory circuit and setting the amount of memory available for temporary storage in response to the output data.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: June 18, 2013
    Assignee: Seagate Technology LLC
    Inventors: Michael Howard Miller, Martin Ragnar Furuhjelm, Jonathan Williams Haines
  • Patent number: 8443165
    Abstract: An exemplary method includes receiving a command for storing data to a plurality of data storage resources, storing the data in a set of buffer storage locations, defining a plurality of jobs for the command, each of the plurality of jobs having an associated data operation with at least one of the data storage resources, and reallocating a subset of the buffer storage locations that stored the data for a completed job prior to completion of at least one other job.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: May 14, 2013
    Assignee: Seagate Technology LLC
    Inventors: Jonathan Williams Haines, Brett Alan Cook, Timothy Richard Feldman, Paul Michael Wiggins
  • Patent number: 8326799
    Abstract: The disclosure is related to systems and methods of distributing data in devices with multiple storage entities. In a particular embodiment, a system is disclosed that includes multiple storage entities, with each storage entity having a sub-controller. A controller is communicatively coupled to each of the multiple storage entities. The controller is configured to send at least one of a respective copy of data or metadata associated with the respective copy of the data to each of the multiple storage entities. Upon receipt of the at least one of the respective copy of the data or the metadata associated with the respective copy of the data, each sub-controller provides storage competency information of the respective storage entity for the respective copy of the data. Upon receiving storage competency information for the multiple storage entities, the controller selects a particular one of the multiple storage entities and notifies the selected storage entity to store the respective copy of the data.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: December 4, 2012
    Assignee: Seagate Technology LLC
    Inventors: Timothy Richard Feldman, Wayne Howard Vinson, Jonathan Williams Haines
  • Patent number: 8291294
    Abstract: Methods and devices are provided for intersymbol interference encoding in a solid state drive. In an illustrative embodiment, an nth data signal is received as input to a processing component. An intersymbol interference signal applicable to the nth data signal is provided, based on a set of prior-written data in a data storage array and a set of intersymbol interference behavior of the set of prior-written data in the data storage array, the data storage array being communicatively connected to the processing component. The nth data signal and the intersymbol interference signal applicable to the nth data signal are combined into an intersymbol-interference-corrected encoding of the nth data signal. The intersymbol-interference-corrected encoding of the nth data signal is provided as output from the processing component.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: October 16, 2012
    Assignee: Seagate Technology LLC
    Inventor: Jonathan Williams Haines
  • Publication number: 20120233432
    Abstract: A fixed data region on a storage medium may be allocated with one of a variety of allocation schemes (e.g., a randomly writable allocation scheme, a non-randomly writeable allocation scheme with a first data isolator spacing, a non-randomly writeable allocation scheme with a second data isolator spacing, and a non-randomly writeable allocation scheme with no dynamic isolators). Dynamic sub-region spacing refers at least to the number of data tracks in a data region of a magnetic disc between dynamic isolators and the number of bits in a data region in flash memory between dynamic isolators. The presently disclosed technology adapts isolators on the storage medium to create dynamic sub-regions based on characteristics of the storage medium, characteristics of the data, and/or expected access patterns of data to be written to the storage medium.
    Type: Application
    Filed: March 9, 2011
    Publication date: September 13, 2012
    Applicant: SEAGATE TECHONOLOGY LLC
    Inventors: Timothy Richard Feldman, Jonathan Williams Haines
  • Publication number: 20120221826
    Abstract: An exemplary method includes receiving a command for storing data to a plurality of data storage resources, storing the data in a set of buffer storage locations, defining a plurality of jobs for the command, each of the plurality of jobs having an associated data operation with at least one of the data storage resources, and reallocating a subset of the buffer storage locations that stored the data for a completed job prior to completion of at least one other job.
    Type: Application
    Filed: May 8, 2012
    Publication date: August 30, 2012
    Applicant: Seagate Technology LLC
    Inventors: Jonathan Williams Haines, Brett Alan Cook, Timothy Richard Feldman, Paul Michael Wiggins
  • Patent number: 8195909
    Abstract: The present disclosure provides a method in a data storage system. The method includes defining a plurality of jobs for a command received from a host. Each of the plurality of jobs is associated with one or more of a plurality of data storage resources of the data storage system. The plurality of jobs have a defined order that is a function of addresses of data in the plurality of data storage resources. The method also includes issuing the plurality of jobs to the associated data storage resources and receiving information from the data storage resources for the plurality of jobs. The information is received by a controller of the data storage system for the jobs in an order that is different than the defined order. The method includes transmitting the received information to the host for the plurality of jobs in the defined order.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: June 5, 2012
    Assignee: Seagate Technology LLC
    Inventors: Jonathan Williams Haines, Brett Alan Cook, Timothy Richard Feldman, Paul Michael Wiggins
  • Publication number: 20120102276
    Abstract: A storage device controller may segregate data units that are typically accessed together to a common storage unit. In one example, a storage device includes a control unit configured to receive a plurality of logical blocks to be stored in the storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks, and a non-volatile memory configured to store logical blocks in a plurality of storage units, wherein one of the plurality of storage units includes logical blocks corresponding to a second set of addresses. The control unit may determine an intersection of the first set of addresses with the second set of addresses and to store each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device, wherein the common storage unit comprises one of the plurality of storage units.
    Type: Application
    Filed: February 15, 2011
    Publication date: April 26, 2012
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Jonathan Williams Haines, Timothy R. Feldman
  • Publication number: 20120102297
    Abstract: A storage device controller may segregate data units that are typically accessed together to a common storage unit. In one example, a storage device includes a control unit configured to receive a plurality of logical blocks to be stored in the storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks, and a non-volatile memory configured to store logical blocks in a plurality of storage units, wherein one of the plurality of storage units includes logical blocks corresponding to a second set of addresses. The control unit may determine an intersection of the first set of addresses with the second set of addresses and to store each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device, wherein the common storage unit comprises one of the plurality of storage units.
    Type: Application
    Filed: February 15, 2011
    Publication date: April 26, 2012
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Jonathan Williams Haines, Timothy R. Feldman
  • Publication number: 20120017045
    Abstract: Multi-resolution cache monitoring devices and methods are provided. Multi-resolution cache devices illustratively have a cache memory, an interface, an information unit, and a processing unit. The interface receives a request for data that may be included in the cache memory. The information unit has state information for the cache memory. The state information is organized in a hierarchical structure. The process unit searches the hierarchical structure for the requested data.
    Type: Application
    Filed: July 14, 2010
    Publication date: January 19, 2012
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Jonathan Williams Haines, Wayne Howard Vinson, Edwin Scott Olds, Timothy Richard Feldman, Steven S. Williams
  • Patent number: 8032699
    Abstract: Systems and methods of monitoring logical block address (LBA) activity are disclosed. In an embodiment, a pattern of a data storage device may be monitored. An LBA may be detected that is accessed based on the pattern. The LBA may be added to a list of LBAs stored in a memory.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: October 4, 2011
    Assignee: Seagate Technology LLC
    Inventors: Timothy Richard Feldman, Edwin Scott Olds, Jonathan Williams Haines, Daniel Joseph Coonen
  • Patent number: 8018766
    Abstract: Methods and devices are provided for concurrent intersymbol interference encoding in a solid state memory. In an illustrative embodiment, a write data signal is received as input to a processing component. A channel-effect-corrected encoding of the write data signal is produced, where the channel-effect-corrected encoding is based on the write data signal and a channel effect factor that models concurrent intersymbol interference of the write data signal in a target data storage component in communicative connection with the processing component. An output signal based on the channel-effect-corrected encoding of the write data signal is produced from the processing component.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: September 13, 2011
    Assignee: Seagate Technology LLC
    Inventors: Jonathan Williams Haines, Timothy Richard Feldman
  • Publication number: 20110161557
    Abstract: This disclosure is related to distributed media cache for data storage systems, such as disc drives, flash devices, or hybrid devices. In one example, a data storage device comprises a data storage medium and a controller adapted to selectively divide a media cache into a plurality of physically separate media cache portions on the data storage medium based on a physical attribute of the data storage medium and to store data received from a host system into the media cache portions.
    Type: Application
    Filed: December 31, 2009
    Publication date: June 30, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Jonathan Williams Haines, Brett Alan Cook
  • Publication number: 20110119442
    Abstract: The present disclosure provides a data storage system. In one example, the data storage system includes a data storage media component having a plurality of data storage locations. A first set of the plurality of data storage locations are allocated for a main data storage area. The data storage system also includes a controller configured to define a write cache for the main data storage area by selectively allocating a second set of the plurality of data storage locations.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 19, 2011
    Applicant: Seagate Technology LLC
    Inventors: Jonathan Williams Haines, Brett Alan Cook, Luke William Friendshuh, Mark Allen Gaertner
  • Publication number: 20110087631
    Abstract: The disclosure is related to systems and methods of distributing data in devices with multiple storage entities. In a particular embodiment, a system is disclosed that includes multiple storage entities, with each storage entity having a sub-controller. A controller is communicatively coupled to each of the multiple storage entities. The controller is configured to send at least one of a respective copy of data or metadata associated with the respective copy of the data to each of the multiple storage entities. Upon receipt of the at least one of the respective copy of the data or the metadata associated with the respective copy of the data, each sub-controller provides storage competency information of the respective storage entity for the respective copy of the data. Upon receiving storage competency information for the multiple storage entities, the controller selects a particular one of the multiple storage entities and notifies the selected storage entity to store the respective copy of the data.
    Type: Application
    Filed: October 9, 2009
    Publication date: April 14, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Timothy Richard Feldman, Wayne Howard Vinson, Jonathan Williams Haines
  • Publication number: 20110082985
    Abstract: The present disclosure provides a method in a data storage system. The method includes defining a plurality of jobs for a command received from a host. Each of the plurality of jobs is associated with one or more of a plurality of data storage resources of the data storage system. The plurality of jobs have a defined order that is a function of addresses of data in the plurality of data storage resources. The method also includes issuing the plurality of jobs to the associated data storage resources and receiving information from the data storage resources for the plurality of jobs. The information is received by a controller of the data storage system for the jobs in an order that is different than the defined order. The method includes transmitting the received information to the host for the plurality of jobs in the defined order.
    Type: Application
    Filed: October 5, 2009
    Publication date: April 7, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Jonathan Williams Haines, Brett Alan Cook, Timothy Richard Feldman, Paul Michael Wiggins
  • Publication number: 20110075490
    Abstract: Data stripes and addressing for flash memory devices are provided. Flash memory devices illustratively have a plurality of programmable devices that are capable of simultaneously storing data. A plurality of erasure blocks are within each of the programmable devices, and each erasure block has pages of transistors. The flash memory devices are logically organized as a plurality of stripes. Each stripe has a height and a width. In an embodiment, the stripe height is greater than one page. In another embodiment, the stripe width is less than all of the programmable devices within the flash memory device.
    Type: Application
    Filed: September 29, 2009
    Publication date: March 31, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Luke William Friendshuh, Mark Allen Gaertner, Jonathan Williams Haines, Timothy Richard Feldman
  • Patent number: 7916537
    Abstract: Embodiments of the disclosure include multilevel memory cell devices that utilize reference point cells to determine the states of other cells. Embodiments of the disclosure also include methods of storing data to and retrieving data from multilevel memory cell devices utilizing reference point cells. In one embodiment, a multilevel memory cell device includes user data cells, a reference point cell, and a controller. The user data cells each has one of a plurality of states. The reference point cell has a first state. The controller determines the states of the user data cells based at least in part on the first state of the reference point cell.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: March 29, 2011
    Assignee: Seagate Technology LLC
    Inventor: Jonathan Williams Haines
  • Publication number: 20110066872
    Abstract: A variety of data storage devices, methods and systems are implemented for control of memory associated with backup functionality. One such data storage device includes a power circuit that provides main power. The data storage device has a first solid-state memory circuit that maintains data in the absence of electrical power. A second memory circuit is subject to data loss in the absence of electrical power. A storage circuit stores energy and provides the stored energy to the second memory circuit in response to a loss of main power. A test circuit discharges a portion of the stored energy to provide output data indicative of power-providing capabilities of the storage circuit. A memory controller controls data transfers to the data storage device by temporarily storing data destined for the first solid-state memory circuit and setting the amount of memory available for temporary storage in response to the output data.
    Type: Application
    Filed: September 16, 2009
    Publication date: March 17, 2011
    Inventors: Michael Howard Miller, Martin Ragnar Furuhjelm, Jonathan Williams Haines
  • Publication number: 20100325340
    Abstract: The disclosure is related to systems and methods of controlling wear of a memory. In a particular embodiment, a system is disclosed that comprises a memory and a performance governor circuit coupled to the memory. The performance governor circuit is adapted to control a wear of the memory as a function of time.
    Type: Application
    Filed: June 23, 2009
    Publication date: December 23, 2010
    Applicant: Seagate Technology LLC
    Inventors: Timothy Richard Feldman, Jonathan Williams Haines, Brett Alan Cook