Patents by Inventor William Hastings

William Hastings has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020071651
    Abstract: A method of indexing and retrieving user specified frames during recording or playback of video images by providing a hard copy representation of such images which contain encoded frame location information for accessing the images on the recording medium. The invention also provides digital transfer of user selected frames on to a digital video disc so as to provide a sequence of selected frames. It further provides a mark in the header of the video disc to enable random access of a desired frame in the sequence of selected frames.
    Type: Application
    Filed: August 31, 2001
    Publication date: June 13, 2002
    Inventors: William Hastings Wurz, Rickson Sun, David John Gilmore, Elinor Jane Fulton Suri, Michael S. Viola
  • Patent number: 5396261
    Abstract: A polysilicon gate bus structure used for activating a row of pixels in a matrix of pixels of an active matrix liquid crystal display is described. The polysilicon gate bus is formed with a plurality of buffers interspersed along its length. A plurality of field effect transistors, each associated with one pixel in a row of pixels, have their gate electrodes connected to the polysilicon gate bus with the buffers interspersed among the gate electrode connections so as to speed up a row scanning signal propagation time to each of the gate electrode connections.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: March 7, 1995
    Assignee: WAH-III Technology Corporation
    Inventor: William A. Hastings, III
  • Patent number: 5396262
    Abstract: A polysilicon gate bus structure used for activating a row of pixels in a matrix of pixels of an active matrix liquid crystal display is described. The polysilicon gate bus is formed with a plurality of buffers interspersed along its length. A plurality of field effect transistors, each associated with one pixel in a row of pixels, have their gate electrodes connected to the polysilicon gate bus with the buffers interspersed among the gate electrode connections so as to speed up a row scanning signal propagation time to each of the gate electrode connections.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: March 7, 1995
    Assignee: WAH-III Technology Corporation
    Inventor: William A. Hastings, III
  • Patent number: 5365355
    Abstract: A back plate structure for a reflective type active matrix liquid crystal display and methods for forming the same, is described. The structure includes an array of reflective electrodes for selectively altering the molecular alignment of liquid crystal material confined above each of the reflective electrodes and an array of light shields spatially offset with the array of reflective electrodes so that the light shields block light passing through portions of gaps formed between adjacent reflective electrodes. Each of the reflective electrodes also has a corresponding light shield which is electrically connected to that reflective electrode so that the liquid crystal material confined above portions of the gaps between adjacent reflective materials can also be altered by the electrically connected light shields.
    Type: Grant
    Filed: March 10, 1993
    Date of Patent: November 15, 1994
    Assignee: WAH-III Technology Corporation
    Inventors: William A. Hastings, III, William N. Buchele
  • Patent number: D459814
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: July 2, 2002
    Assignee: Medtronic, Inc.
    Inventors: David Warren Lee, William Hastings Wurz