Abstract: A system and method of adaptively reconfiguring a pool of buffers are provided. The buffers are initially configured to a size (i.e., a current size). Each time data is placed in the buffers by an application program, it is determined whether the size of the data is greater than the current size of the buffers. If the size of the data is greater than the current size of the buffers, the buffers are reconfigured to the size of the data if the number of times data of that size is stored in the buffers is greater than a first threshold. If, however, the size of the data is smaller than the current size of the buffers, the buffers may be reconfigured to the size of the data if the number of times data of that size is stored in the buffers is smaller than a second threshold.

Abstract: A method, system, and program product for saving a state of a task and executing the task by processors such that following the termination of execution of the first task in a first processor, at least a portion of a state of the first task is maintained in registers of the first processor until the first processor executes a second task. Prior to executing the first task on the second processor, a determination is made as to whether the state of the first task is at least partially stored in the registers of another processor, such as the first processor. If the state of the first task is at least partially stored in the registers of the first processor, then contents of said registers in the first processor are stored into a memory system. Thereafter, the first task is executed in the second processor.

Abstract: A method and apparatus is presented for controlling spin lock instrumentation for a spin lock in a system with a cache. A lock flag represents a busy state for the spin lock; a first instrumentation flag is a global variable representing an enablement state for the spin lock instrumentation. A second instrumentation flag, stored within the same cache line as the lock flag, is also maintained as an updateable indication of the first instrumentation flag. Prior to each acquirement of the spin lock, the second instrumentation flag is checked for an indication that spin lock instrumentation is enabled. Although a reading of the lock flag may generate a cache miss, the lock flag is necessarily checked upon attempting to acquire the lock; the check of the second instrumentation flag cannot generate a superfluous cache miss because the second instrumentation flag is in the same cache line as the lock flag.

Abstract: A method and system is presented for controlling spin lock instrumentation for a spin lock in a data processing system that has a cache. A lock flag represents a busy state for the spin lock; a first instrumentation flag is a global variable that represents an enablement state for the spin lock instrumentation. A second instrumentation flag, stored within the same cache line as the lock flag, is also maintained as an updateable indication of the first instrumentation flag. Prior to each acquirement of the spin lock, the second instrumentation flag is checked to see if it indicates that spin lock instrumentation is enabled. Although a reading of the lock flag may generate a cache miss, the lock flag is necessarily checked upon attempting to acquire the lock; the check of the second instrumentation flag cannot generate a superfluous cache miss because the second instrumentation flag is in the same cache line as the lock flag.

Abstract: An apparatus and method for allocating virtual memory upon demand to reduce the amount of virtual memory allocated. Privilege level transitions requested by a program of instructions invoke a fault handler routine which allocates memory for implementing the transition. Allocation of memory is thus delayed until such request for privilege level transition occurs.

Abstract: The present invention is directed to a system and method of measuring performance data utilizing state transitions within a computer system. A number of system states are defined, and the transitions from one state to another are tracked. At each state transition, performance properties related to the computer system may be checked or calculated, and performance data added to a table or tables. The present invention allows performance data to be measured in a way that is highly precise and has minimal effects on the system performance being measured. The act of measuring performance data utilizing state transitions does not create a misleading measure of performance nor does it adversely impact system performance. Furthermore, the present invention requires minimal changes to the operating system and no changes to application code.

Abstract: The present invention is directed to a system and method of measuring performance data utilizing state transitions within a computer system. A number of system states are defined, and the transitions from one state to another are tracked. At each state transition, performance properties related to the computer system may be checked or calculated, and performance data added to a table or tables. The present invention allows performance data to be measured in a way that is highly precise and has minimal effects on the system performance being measured. The act of measuring performance data utilizing state transitions does not create a misleading measure of performance nor does it adversely impact system performance. Furthermore, the present invention requires minimal changes to the operating system and no changes to application code.