Patents by Inventor William J. Armstrong
William J. Armstrong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7941803Abstract: Methods, apparatus, and products are disclosed for controlling an operational mode for a logical partition on a computing system that include: receiving, in a hypervisor installed on the computing system, a processor compatibility mode for the logical partition and a firmware compatibility mode for the logical partition, the processor compatibility mode specifying a processor architecture version configured for the logical partition, and the firmware compatibility mode specifying a firmware architecture version configured for the logical partition; providing, by the hypervisor for the logical partition, a firmware interface in dependence upon the firmware compatibility mode; and providing, by the hypervisor for the logical partition, a processor interface in dependence upon the processor compatibility mode.Type: GrantFiled: January 15, 2007Date of Patent: May 10, 2011Assignee: International Business Machines CorporationInventors: William J. Armstrong, Richard L. Arndt, David A. Larson, Naresh Nayar
-
Patent number: 7802252Abstract: A method and system for selecting the architecture level to which a processor appears to conform within a computing environment when executing specific logical partitions or programs and performing migration among different levels of processor architecture. The method utilizes a “processor compatibility register” (PCR) that controls the level of the architecture that the processor appears to support. In one embodiment, the PCR is accessible only to super-privileged software. The super-privileged software sets bits in the PCR that specify the architecture level that the processor is to appear to support so that when the program runs on the processor, the processor behaves in accordance with the architecture level for which the program was designed.Type: GrantFiled: January 9, 2007Date of Patent: September 21, 2010Assignee: International Business Machines CorporationInventors: William J. Armstrong, Richard L. Arndt, Michael J. Corrigan, Giles R. Frazier, Timothy R. Marchini, Cathy May, Naresh Nayar, John T. O'Quin, II
-
Patent number: 7765428Abstract: Replacing a failing physical processor in a computer supporting multiple logical partitions, where the logical partitions include dedicated partitions and shared processor partitions, the dedicated partitions are supported by virtual processors having assigned physical processors, and the shared processor partitions are supported by pools of virtual processors. The pools of virtual processors have assigned physical processors.Type: GrantFiled: December 8, 2008Date of Patent: July 27, 2010Assignee: International Business Machines CorporationInventors: William J. Armstrong, Naresh Nayar, Gary R. Ricard
-
Patent number: 7698700Abstract: Methods, systems, and articles of manufacture for allowing an update to an executable component, such as a logical partitioning operating system, running on a computer system without requiring a reboot (or IPL) of the computer system are provided. Processors or tasks executing in a portion of code being updated may be forced to a known or “quiesced” state (e.g., designated wait points) before applying the update. If any of the processors or tasks are not in their quiesced state, the update is not applied or may be rescheduled for a later time, in an effort to allow the system to reach the quiesced state.Type: GrantFiled: April 17, 2003Date of Patent: April 13, 2010Assignee: International Business Machines CorporationInventors: William J. Armstrong, Robert J. Battista, Christopher Francois, Naresh Nayar
-
Publication number: 20090106586Abstract: Assigning a processor to a logical partition in a computer supporting multiple logical partitions that include assigning priorities to partitions, detecting a checkstop of a failing processor of a partition, retrieving the failing processor's state, replacing by a hypervisor the failing processor with a replacement processor from a partition having a priority lower than the priority of the partition of the failing processor, and assigning the retrieved state of the failing processor as the state of the replacement processor.Type: ApplicationFiled: January 6, 2009Publication date: April 23, 2009Applicant: INTERNATIONL BUSINESS MACHINES CORPORATIONInventors: William J. Armstrong, Naresh Nayar, Gary R. Ricard
-
Publication number: 20090083575Abstract: Replacing a failing physical processor in a computer supporting multiple logical partitions, where the logical partitions include dedicated partitions and shared processor partitions, the dedicated partitions are supported by virtual processors having assigned physical processors, and the shared processor partitions are supported by pools of virtual processors. The pools of virtual processors have assigned physical processors.Type: ApplicationFiled: December 8, 2008Publication date: March 26, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William J. Armstrong, Naresh Nayar, Gary R. Ricard
-
Patent number: 7493515Abstract: Assigning a processor to a logical partition in a computer supporting multiple logical partitions that include assigning priorities to partitions, detecting a checkstop of a failing processor of a partition, retrieving the failing processor's state, replacing by a hypervisor the failing processor with a replacement processor from a partition having a priority lower than the priority of the partition of the failing processor, and assigning the retrieved state of the failing processor as the state of the replacement processor.Type: GrantFiled: September 30, 2005Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: William J. Armstrong, Naresh Nayar, Gary R. Ricard
-
Publication number: 20090037682Abstract: Access control to shared virtual address space within a single logical partition is provided. The access control includes: associating, by a hypervisor of the data processing system, a memory protection key with a portion of a single logical partition's virtual address space being shared by multiple entities, the key preventing access by one of the multiple entities to that portion of the virtual address space, and allowing access by another of the entities to that portion of the virtual address space; and locking by the hypervisor the memory protection key from modification by the one entity, wherein the locking prevents the one entity from modifying the key and thereby gaining access to the portion of the single logical partition's virtual address space with the associated memory protection key. In one embodiment, the one entity is the single logical partition itself, and the another entity is a partition adjunct.Type: ApplicationFiled: April 28, 2008Publication date: February 5, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William J. ARMSTRONG, Orran Y. KRIEGER, Cathy MAY, Michal OSTROWSKI, Randal C. SWANBERG
-
Publication number: 20090037941Abstract: Multiple logical partitions are provided access to a self-virtualizing input/output device of a data processing system via multiple dedicated partition adjunct instances.Type: ApplicationFiled: April 28, 2008Publication date: February 5, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William J. ARMSTRONG, Charles S. GRAHAM, Sandy K. KAO, Kyle A. LUCKE, Naresh NAYAR, Michal OSTROWSKI, Renato J. RECIO, Randal C. SWANBERG
-
Publication number: 20090037908Abstract: Dedicated access is provided to a physical input/output (I/O) device which is non-configurable by an initiating logical partition. Access is established by: initiating, by the logical partition, creation of a partition adjunct; invoking a hypervisor of the data processing system to instantiate the partition adjunct with resources donated from the initiating logical partition, the donated resources including a donated virtual address space of the logical partition and the physical I/O device; creating, by the hypervisor, the partition adjunct and assigning the donated virtual address space and donated physical I/O device to the created partition adjunct; and interfacing, by the hypervisor, the logical partition and the created partition adjunct, the interfacing including providing the logical partition with a virtual I/O device which replaces the donated physical I/O device, and which is configurable by the logical partition.Type: ApplicationFiled: April 28, 2008Publication date: February 5, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William J. ARMSTRONG, Orran Y. KRIEGER, Michal OSTROWSKI, Randal C. SWANBERG
-
Publication number: 20090037906Abstract: A partition adjunct is provided for a logical partition running above a hypervisor of a data processing system. The partition adjunct, which is a separate dispatchable partition from an instantiating logical partition, provides one or more services to the logical partition. A service request received from the logical partition is processed by the partition adjunct utilizing virtual address space donated to the partition adjunct from the logical partition. The partition adjunct and the logical partition share a common virtual address to real address page table, and context switching the current state machine from the logical partition to the partition adjunct occurs without invalidating or modifying state data of selected memory management and address translation hardware of the data processing system. In a hardware multithreaded system, the partition adjunct is dispatched on a single thread, while another thread continues to run in the logical partition initiating the service request.Type: ApplicationFiled: April 28, 2008Publication date: February 5, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William J. ARMSTRONG, Orran Y. KRIEGER, Michal OSTROWSKI, Randal C. SWANBERG
-
Publication number: 20090037907Abstract: A method in a data processing system is provided for processing a service request of a client partition. The method includes: obtaining by a service partition of the data processing system the service request from the client partition, wherein both the client and service partitions execute above a hypervisor of the data processing system; and processing the service request by the service partition utilizing a processor quantum assigned to the client partition and donated by the client partition to the service partition. The client partition controls scheduling of the service partition by queuing the service request at the client partition until the client partition decides to proceed with execution of the service request by the service partition. In one implementation, the service partition is a partition adjunct of the data processing system, which utilizes donated virtual address space of the client partition.Type: ApplicationFiled: April 28, 2008Publication date: February 5, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William J. ARMSTRONG, Orran Y. KRIEGER, Michal OSTROWSKI, Randal C. SWANBERG
-
Patent number: 7478272Abstract: Replacing a failing physical processor in a computer supporting multiple logical partitions, where the logical partitions include dedicated partitions and shared processor partitions, the dedicated partitions are supported by virtual processors having assigned physical processors, and the shared processor partitions are supported by pools of virtual processors. The pools of virtual processors have assigned physical processors.Type: GrantFiled: September 30, 2005Date of Patent: January 13, 2009Assignee: International Business Machines CorporationInventors: William J. Armstrong, Naresh Nayar, Gary R. Ricard
-
Publication number: 20080172554Abstract: Methods, apparatus, and products are disclosed for controlling an operational mode for a logical partition on a computing system that include: receiving, in a hypervisor installed on the computing system, a processor compatibility mode for the logical partition and a firmware compatibility mode for the logical partition, the processor compatibility mode specifying a processor architecture version configured for the logical partition, and the firmware compatibility mode specifying a firmware architecture version configured for the logical partition; providing, by the hypervisor for the logical partition, a firmware interface in dependence upon the firmware compatibility mode; and providing, by the hypervisor for the logical partition, a processor interface in dependence upon the processor compatibility mode.Type: ApplicationFiled: January 15, 2007Publication date: July 17, 2008Inventors: William J. Armstrong, Richard L. Arndt, David A. Larson, Naresh Nayar
-
Publication number: 20080168258Abstract: A method and system for selecting the architecture level to which a processor appears to conform within a computing environment when executing specific logical partitions or programs and performing migration among different levels of processor architecture. The method utilizes a “processor compatibility register” (PCR) that controls the level of the architecture that the processor appears to support. In one embodiment, the PCR is accessible only to super-privileged software. The super-privileged software sets bits in the PCR that specify the architecture level that the processor is to appear to support so that when the program runs on the processor, the processor behaves in accordance with the architecture level for which the program was designed.Type: ApplicationFiled: January 9, 2007Publication date: July 10, 2008Inventors: William J. Armstrong, Richard L. Arndt, Michael J. Corrigan, Giles R. Frazier, Timothy R. Marchini, Cathy May, Naresh Nayar, John T. O'Quin
-
Publication number: 20040210890Abstract: Methods, systems, and articles of manufacture for allowing an update to an executable component, such as a logical partitioning operating system, running on a computer system without requiring a reboot (or IPL) of the computer system are provided. Processors or tasks executing in a portion of code being updated may be forced to a known or “quiesced” state (e.g., designated wait points) before applying the update. If any of the processors or tasks are not in their quiesced state, the update is not applied or may be rescheduled for a later time, in an effort to allow the system to reach the quiesced state.Type: ApplicationFiled: April 17, 2003Publication date: October 21, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William J. Armstrong, Robert J. Battista, Christopher Francois, Naresh Nayar
-
Patent number: 6353845Abstract: An apparatus, program product and method of handling tasks that are sleeping and waiting for the completion of I/O operations of other tasks comprises determining a second task which is to await the completion of the I/O operations of a first task, and putting the second task to sleep. A timer is created and associated with the second task. The timer expires when a predetermined wait interval is exceeded. When the timer expires, the sleeping second task is awoken so that a sleeping task is generally prevented from waiting indefinitely for the I/O operations of another task.Type: GrantFiled: June 25, 1998Date of Patent: March 5, 2002Assignee: International Business Machines CorporationInventors: Timothy J. Torzewski, William J. Armstrong, Jr.
-
Patent number: 5516204Abstract: A shelf assembly for a refrigerator with a pair of ladder tracks secured the rear wall of a storage compartment includes a pair of supports with bases secured to the tracks. Each shelf support includes a vertical wall extending forwardly from the track and a flange projecting inwardly of the vertical wall. A rectilinear shelf member has front, rear and side edges and a rim structure encapsulates the edges of the shelf and includes a pair of slide portions which are positioned below the side edges of the shelf member and are slidably supported on the flanges. Each flange includes a downwardly extending inner edge and each rim slide portion projects downwardly adjacent and then outwardly under the corresponding flange inner edge. The shelf member has a planar upper surface and the rim structure closely overlaps the shelf member edges to restrain flow of spilt liquid between the shelf member and the rim.Type: GrantFiled: July 11, 1994Date of Patent: May 14, 1996Assignee: General Electric CompanyInventors: Scott A. Calvert, Frank S. Pang, William J. Armstrong
-
Patent number: 4798425Abstract: A compartment assembly for a refrigerator comprising a panel on the inside of a refrigerator door, the panel having a recess area with a rear wall, a top wall and at least two spaced apart vertical dikes directed outwardly from the rear wall. The recess area has at the bottom an inwardly directed lip and the dikes have a side wall and a front face with the front face having a slot. There is a tray having a bottom wall, an integrally formed rear wall, front wall, and side walls, with the side walls each having a flange projecting outwardly perpendicular to the side walls and each of the flanges have a rearwardly projecting hook shaped element parallel to the side walls. The tray has a length such that the hook shaped elements cooperate with the slots in the vertical dikes for engagement and a horizontal depth such that the front wall projects outwardly from the dikes and the rear wall extends to the rear wall of the recess and rests on the projecting lip.Type: GrantFiled: February 22, 1988Date of Patent: January 17, 1989Assignee: General Electric CompanyInventors: William J. Armstrong, Richard A. Stich
-
Patent number: 4789130Abstract: A container and ice cube tray assembly to store a plurality of relatively small similarly shaped items with easy user manual access. The container has a corrugated bottom wall and two spaced apart side walls integrally connected to the bottom wall and terminating at the top thereof in an outwardly directed flange. Located near the junction of the side walls and outwardly directed flanges is a longitudinal groove extending therealong. The container has two spaced apart end walls, said end walls integrally connected to the bottom and side walls and extend up the side walls a substantial distance and each has a terminal end extending in a horizontal plane parallel to the bottom wall the full width of the container to allow user manual access from either end of the container to the small items stored in the container.Type: GrantFiled: June 5, 1987Date of Patent: December 6, 1988Assignee: General Electric CompanyInventors: Richard A. Stich, William J. Armstrong