Abstract: A method and apparatus for plasma enhanced chemical vapor deposition to an interior region of a hollow, tubular, high aspect ratio workpiece are disclosed. A plurality of anodes are disposed in axially spaced apart arrangement, to the interior of the workpiece. A process gas is introduced into the region. A respective individualized DC or pulsed DC bias is applied to each of the anodes. The bias excites the process gas into a plasma. The workpiece is biased in a hollow cathode arrangement. Pressure is controlled in the interior region to maintain the plasma. An elongated support tube arranges the anodes, and receives a process gas tube. A current splitter provides a respective selected proportion of a total current to each anode. One or more notch diffusers or chamber diffusers may diffuse the process gas or a plasma moderating gas. Plasma impedance and distribution may be controlled using various means.

Abstract: A method and apparatus for plasma enhanced chemical vapor deposition to an interior region of a hollow, tubular, high aspect ratio workpiece are disclosed. A plurality of anodes are disposed in axially spaced apart arrangement, to the interior of the workpiece. A process gas is introduced into the region. A respective individualized DC or pulsed DC bias is applied to each of the anodes. The bias excites the process gas into a plasma. The workpiece is biased in a hollow cathode arrangement. Pressure is controlled in the interior region to maintain the plasma. An elongated support tube arranges the anodes, and receives a process gas tube. A current splitter provides a respective selected proportion of a total current to each anode. One or more notch diffusers or chamber diffusers may diffuse the process gas or a plasma moderating gas. Plasma impedance and distribution may be controlled using various means.

Abstract: A method and apparatus for plasma enhanced chemical vapor deposition to an interior region of a hollow, tubular, high aspect ratio workpiece are disclosed. A plurality of anodes are disposed in axially spaced apart arrangement, to the interior of the workpiece. A process gas is introduced into the region. A respective individualized DC or pulsed DC bias is applied to each of the anodes. The bias excites the process gas into a plasma. The workpiece is biased in a hollow cathode arrangement. Pressure is controlled in the interior region to maintain the plasma. An elongated support tube arranges the anodes, and receives a process gas tube. A current splitter provides a respective selected proportion of a total current to each anode. One or more notch diffusers or chamber diffusers may diffuse the process gas or a plasma moderating gas. Plasma impedance and distribution may be controlled using various means.

Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.

Abstract: A method of coating at least one exterior surface of at least one workpiece is disclosed. The method may be used for coating inner and outer surfaces of pipes. A hollow workpiece is positioned within a chamber. A spacing between a multi-dimensional interior surface of the chamber and an exterior surface of the workpiece is fixed. Conditions are established to maintain a hollow cathode effect within the spacing and within the hollow workpiece. The conditions include biasing anodes at opposite ends of a hollow cathode effect region, and biasing the interior surface of the chamber and the workpiece as cathodes. The interior surface and the workpiece may be maintained at a common bias voltage or, in at least one embodiment, at differing voltages.

Abstract: A method of forming a diamond-like carbon coating by plasma enhanced chemical vapor deposition on an internal surface of a hollow component having an inner surface. A reduced atmospheric pressure is created within a pipe or other hollow component to be treated. A diamondoid precursor gas is introduced to the interior of the component. A bias voltage is established between a first electrode and one or more second electrodes. The first electrode is or is attached to the component. The second electrode is externally offset from an opening of the component, by a hollow insulator. A plasma region is established adjacent an inner surface of the component and extends through the hollow insulator. The precursor gas comprises at least one diamondoid. The pressure and bias voltage are selected such as to cause the deposition of diamond-like carbon on the inner surface.

Abstract: A method and apparatus for plasma enhanced chemical vapor deposition to an interior region of a hollow, tubular, high aspect ratio workpiece are disclosed. A plurality of anodes are disposed in axially spaced apart arrangement, to the interior of the workpiece. A process gas is introduced into the region. A respective individualized DC or pulsed DC bias is applied to each of the anodes. The bias excites the process gas into a plasma. The workpiece is biased in a hollow cathode arrangement. Pressure is controlled in the interior region to maintain the plasma. An elongated support tube arranges the anodes, and receives a process gas tube. A current splitter provides a respective selected proportion of a total current to each anode. One or more notch diffusers or chamber diffusers may diffuse the process gas or a plasma moderating gas. Plasma impedance and distribution may be controlled using various means.

Abstract: In accordance with one embodiment of the invention, a workpiece having a smaller cross sectional dimension (e.g., diameter) is centered within a workpiece having a larger cross sectional dimension, with the workpieces being electrically connected. In this embodiment, surfaces of the two workpieces can be coated simultaneously, either with the same coating material or different coating materials. In another embodiment, holes are located along the length of an internal metal tube which functions as a gas distribution injector and anode holder. A ceramic liner may be placed inside the internal metal tube, with a conductive wire within the ceramic liner. The internal metal tube may be biased as a cathode, while the internal wire is biased as an anode. The hollow cathode effect is applied in all spaces directly adjacent to the surface or surfaces being coated. In some applications, different surfaces being coated are biased at different voltages.

Abstract: The invention relates to a method for forming high sp3 content amorphous carbon coatings deposited by plasma enhanced chemical vapor deposition on internal surfaces and employing the “hollow-cathode” technique. This method allows adjustment of tribological properties, such as hardness, Young's modulus, wear resistance and coefficient of friction as well as optical properties, such as refractive index. In addition the resulting coatings are uniform and have high corrosion resistance. By controlling pressure, type of diamondoid precursor and bias voltage, the new method prevents the diamondoid precursor from fully breaking upon impact with the substrate. The diamondoid retains sp3 bonds which yields a high sp3 content film at higher pressure. This enables a faster deposition rate than would be possible without the use of a diamondoid precursor.

Abstract: A “hybrid” photovoltaically active layer is homogenous (in a direction parallel to the major surfaces of the layer) with respect to film constituents, but is non-homogenous with respect to photovoltaic properties. First regions exhibit high absorptivity, while second regions that are perpendicular to the major surfaces of the layer exhibit a higher carrier mobility. The method for forming the layer includes one or all of chemical vapor deposition, the hollow cathode effect, and high power DC pulsing.

Abstract: The invention relates to a method for forming high sp3 content amorphous carbon coatings deposited by plasma enhanced chemical vapor deposition on external surfaces. This method allows adjustment of tribological properties, such as hardness, Young's modulus, wear resistance and coefficient of friction as well as optical properties, such as refractive index. In addition the resulting coatings are uniform and have high corrosion resistance. By controlling pressure, type of diamondoid precursor and bias voltage, the new method prevents the diamondoid precursor from fully breaking upon impact with the substrate. The diamondoid retains sp3 bonds which yields a high sp3 content film at higher pressure. This enables a faster deposition rate than would be possible without the use of a diamondoid precursor.

Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.

Abstract: The present invention relates to a flash EEPROM cell using polysilicon-to-polysilicon hot electron emission to erase the memory contents of the cell. Exemplary embodiments include a side gate, a control gate, a floating gate and source and drain regions. Appropriate biasing of these gates and source and drain regions controls the electron population of the floating gate. The memory cells may be of either the double polysilicon or triple polysilicon variety. Peripheral transistors are formed from a last formed polysilicon layer to avoid degrading the peripheral transistors.

Abstract: A method for making an anti-fuse structure characterized by the steps of forming a conductive base layer; forming an anti-fuse layer over the base layer; patterning the anti-fuse layer to form an anti-fuse island; forming an insulating layer over the anti-fuse island; forming a via hole through the insulating layer to the anti-fuse island; forming a conductive connection layer over the insulating layer and within the via hole; and patterning the conductive connection layer to form a conductive contact to the anti-fuse island. Preferably, the anti-fuse island comprises amorphous silicon which can optionally be covered with a thin layer of a titanium-tungsten alloy.

Abstract: An anti-fuse structure characterized by a substrate, an oxide layer formed over the substrate having an opening formed therein, an amorphous silicon material disposed within the opening and contacting the substrate, a conductive protective material, such as titanium tungsten, disposed over the amorphous silicon material, and oxide spacers lining the walls of a recess formed within the protective material. The protective material and the spacers provide tighter programming voltage distributions for the anti-fuse structure and help prevent anti-fuse failure.

Abstract: For a structure with an overlapping gate region, a first insulator layer is placed on a substrate. A source/drain polysilicon layer is placed on the insulator layer. The source/drain polysilicon layer is doped with atoms of a first conductivity type. A second insulator layer is placed on the source/drain polysilicon layer. A gap is etched in the second insulator layer and the source/drain polysilicon layer to expose a portion of the first insulator layer. The exposed portion of the first insulator layer and an additional amount of the first insulator layer under the second insulator is etched so as to enlarge the gap and to undercut a portion of the source/drain polysilicon layer. Two polysilicon filler regions are formed which fill a portion of the gap including the undercut area under the source/drain polysilicon layer. A gate polysilicon region is formed in the gap and extends over the source/drain polysilicon layer.

Abstract: An anti-fuse structure characterized by a substrate, an oxide layer formed over the substrate having an opening formed therein, an amorphous silicon material disposed within the opening and contacting the substrate, and oxide spacers lining the walls of a recess formed within the amorphous silicon. The spacers prevent failures of the anti-fuse structures by covering cusps formed in the amorphous silicon material. The method of the present invention forms the above-described anti-fuse structure and further solves the problem of removing unwanted spacer material from areas outside of the anti-fuse structure locations.