Patents by Inventor William J. Gleeson, III

William J. Gleeson, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130268229
    Abstract: A method is proposed for finding Fault-to-Failure signatures using ordered health states. A data matrix including reference values for a healthy device and degraded values for different degradation levels is processed to determine which data parameters, and more particularly which data parameter time windows, vary from the reference values both with an “order” and a “separation” consistent with ordered health states. The time sample at which a minimum gap between ordered health states is a maximum may determine the window end point. The window start point may be determined by walking back from the end point to the time sample at which the minimum gap crosses a threshold. In this manner, the time window starts when an acceptable order among the health states is first attained and ends when the separation is the strongest.
    Type: Application
    Filed: April 4, 2012
    Publication date: October 10, 2013
    Inventors: William J. Gleeson, III, Robert S. Wagoner, Neil W. Kunst
  • Publication number: 20120232814
    Abstract: The present invention provides a frequency-sampling circuit and method for characterizing a health condition of a test unit attached to a power supply. The frequency-sampling circuit is connected externally to the test unit. The circuit comprises an inductor and a capacitor connected in series at an output. When switched, the circuit resonates with an AC loop current to produce a damped-frequency response at the output. Frequency measurements of this response are processed to generate SoH or RUL estimates for the test unit. The voltages applied within the frequency-sampling circuit are limited, which in turn limits the AC loop current to avoid loading the power supply. Incorporating the inductance and capacitance with in the frequency-sampling circuit allows the circuit to be configured for different classes of test units having a wide range of characteristic impedances.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 13, 2012
    Inventors: James P. Hofmeister, Douglas L. Goodman, William J. Gleeson, III
  • Patent number: 5332975
    Abstract: A system for converting digital data to sine waves of differing frequency for networking computers. The sine waves are synthesized using variable encoding. The data is shifted through registers at a multiple of the data rate with the state of the stages of the register monitored to locate the zero-crossing of the sine wave. The state of the register stages is supplied to a series of multiplexers and resistors to generate the segments used to synthesize the sine waves. The data is monitored to derive a signal supplied to the multiplexers to determine the encoding pattern for each bit cell of data.
    Type: Grant
    Filed: December 1, 1992
    Date of Patent: July 26, 1994
    Assignee: NetMedia Inc.
    Inventors: James R. Young, William J. Gleeson, III
  • Patent number: 5216301
    Abstract: A digital self-calibrating delay line is disclosed wherein in a chain of individual but identical time delay elements a calibrated signal running therethrough is compared with the subsequent input signal on each of the individual time delay elements until a coincidence time delay element is determined at which time an output is indicated. The period of the calibrating signal is chosen to be equal to the delay to be imparted to a signal to be delayed. Prior to or upon the appearance of the signal to be delayed, the calibration signal is removed and the incoming signal inserted into the time delay chain to output at the individual time delay element determined by the calibration signal. In an alternate embodiment, by the addition of a few components to each of the time delay elements, the subject invention is interconnected to output a signal whose frequency is a multiple of the input signal.
    Type: Grant
    Filed: December 20, 1991
    Date of Patent: June 1, 1993
    Assignee: Artisoft, Inc.
    Inventors: William J. Gleeson, III, James R. Young
  • Patent number: 5159209
    Abstract: A circuit to selectively process dip switches onto bus lines in a computer or device utilizing digital logic circuits wherein the dip switches are operably connected to a changeable source of digital signals so that upon command at desired times, the output of the dip switches connected to the bus lines may be reversed. Such a circuit consists of connecting the dip switches on one side to the bus lines and the other side through a current limiting resistor to the output of a logic circuit such as a NAND gate or other circuit which constantly outputs a digital signal. The input then to this logic circuit may be changed as desired to reverse the logic circuit output and thus the output of the dip switches. If desired, in place of the NAND gate output, the current limiting resistor may be grounded or connected to digital "1" in which case a constant digital signal is outputted to the bus lines upon dip switch closure.
    Type: Grant
    Filed: April 12, 1991
    Date of Patent: October 27, 1992
    Assignee: Artisoft, Inc.
    Inventor: William J. Gleeson, III
  • Patent number: 4902274
    Abstract: An improved multiple afferent sensory stimulation device is provided to receive a prerecorded tape program upon which the audio stimulation and control signals for the visual stimulation of a subject person's eyes and ears is provided, the invention consisting of a reproducing device to emit the audio and visual control signals on separate channels, the audio stimulation proceeding to earphones worn by the subject person, and the visual stimulation control signals processed electronically. This electronic processing includes amplifiers receiving the electronic signals for amplification, means to convert the AC signals to stretched out positive pulses, and means to utilize the stretched pulses to turn on and turn off the visual stimulation components of the invention. Visual stimulation components utilized may be electrofluorescent lights or incandescent bulbs placed directly in front of the subject person's eyes.
    Type: Grant
    Filed: October 11, 1988
    Date of Patent: February 20, 1990
    Inventor: William J. Gleeson, III
  • Patent number: 4892106
    Abstract: A multiple afferent sensory stimulation device is provided to receive a prerecorded tape program upon which the audio stimulation and control signals for the visual stimulation of a subject person's eyes and ears is provided, the invention consisting of a reproducing device to emit the audio and visual control signals on separate left and right channels, the audio stimulation proceeding directly to earphones worn by the subject person, and the visual stimulation control signals processed electronically. The electronic processing includes devices to frequency separate the audio stimulus signals from the control signals, an automatic gain control circuit to assure sufficient amplitude of visual control signals for processing, tone decoders to separate signals energizing the visual stimulus and turning off the visual stimulus, logic circuit to assure certainty of the on and off stimulus control signals, the electrical stimulus provided by an electrical lamp immediately in front of the subject person's eyes.
    Type: Grant
    Filed: October 19, 1987
    Date of Patent: January 9, 1990
    Inventor: William J. Gleeson, III