Patents by Inventor William J Gustafson
William J Gustafson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11962017Abstract: The disclosed technology generally relates to energy storage devices, and more particularly to energy storage devices comprising frustules. According to an aspect, a supercapacitor comprises a pair of electrodes and an electrolyte, wherein at least one of the electrodes comprises a plurality of frustules having formed thereon a surface active material. The surface active material can include nanostructures. The surface active material can include one or more of a zinc oxide, a manganese oxide and a carbon nanotube.Type: GrantFiled: January 25, 2023Date of Patent: April 16, 2024Assignee: Printed Energy Pty LtdInventors: Vera N. Lockett, Yasser Salah, John G. Gustafson, William J. Ray, Sri Harsha Kolli
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Publication number: 20240109780Abstract: A printed energy storage device includes a first electrode, a second electrode, and a separator between the first and the second electrode. At least one of the first electrode, the second electrode, and the separator includes frustules, for example of diatoms. The frustules may have a uniform or substantially uniform property or attribute such as shape, dimension, and/or porosity. A property or attribute of the frustules can also be modified by applying or forming a surface modifying structure and/or material to a surface of the frustules. A membrane for an energy storage device includes frustules. An ink for a printed film includes frustules.Type: ApplicationFiled: May 1, 2023Publication date: April 4, 2024Inventors: Vera N. Lockett, John G. Gustafson, Mark D. Lowenthal, William J. Ray
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Patent number: 8089971Abstract: Method and system for network communication between a first port and second port using plurality virtual lanes provided. The method includes: (a) configuring a threshold value for each of the plurality of virtual lanes; wherein the threshold value defines an amount of data that has to be moved from a receive segment of the second port, before a flow control packet is sent by the second port to the first port; (b) setting a timer value for each of the plurality of virtual lanes; wherein a flow control packet is sent by the second port after the timer expires; (c) monitoring the amount of data removed from the receive segment of the second port; and (c) sending a flow control packet if the amount of data exceeds the threshold value or if the timer set in step (b) has expired.Type: GrantFiled: April 14, 2009Date of Patent: January 3, 2012Assignee: QLOGIC, CorporationInventors: James A. Kunz, Ian G. Colloff, William J. Gustafson
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Patent number: 8081650Abstract: A method for assigning virtual lanes (VL) in a fiber channel switch is provided. The fiber channel switch element includes a virtual lane cache that can compare incoming frame parameters based on which virtual lanes may be assigned; and a register to store parameters used for virtual lane assignment. The method includes, determining if VL assignment is to be based on an incoming frame parameter or a programmed value; determining if an incoming frame is a preferred frame; and assigning a preferred routing priority if the incoming frame is designated as a preferred frame. The method also includes, determining if a fabric topology is known; and assigning virtual lanes based on a known fabric topology.Type: GrantFiled: April 22, 2009Date of Patent: December 20, 2011Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Edward C. Ross, William J Gustafson
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Publication number: 20090316592Abstract: A method for assigning virtual lanes (VL) in a fibre channel switch is provided. The fibre channel switch element includes a virtual lane cache that can compare incoming frame parameters based on which virtual lanes may be assigned; and a register to store parameters used for virtual lane assignment. The method includes, determining if VL assignment is to be based on an incoming frame parameter or a programmed value; determining if an incoming frame is a preferred frame; and assigning a preferred routing priority if the incoming frame is designated as a preferred frame. The method also includes, determining if a fabric topology is known; and assigning virtual lanes based on a known fabric topology.Type: ApplicationFiled: April 22, 2009Publication date: December 24, 2009Inventors: Frank R. Dropps, Edward C. Ross, William J. Gustafson
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Publication number: 20090168772Abstract: A method and system for implementing LUN based hard zoning in a fibre channel network is provided. A LUN field in a Fibre Channel SCSI command frame is compared with a list of LUNS that are allowed for a particular frame source; and the frame is forwarded if the LUN is allowed for the frame source. The comparison is performed by a port receiving the frame by using an address look up table (“ALUT”). Hard zoning is based on various frame fields and/or ALUT control codes. Also provided is a method for processing a reply to a SCSI REPORT LUN command from an initiator. The method includes, intercepting a reply to a REPORT LUN command; editing the reply to remove unauthorized LUNs; and sending the edited reply to the initiator.Type: ApplicationFiled: October 27, 2008Publication date: July 2, 2009Inventors: Frank R. Dropps, William J. Gustafson, Gary M. Papenfuss
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Patent number: 7525983Abstract: A method for assigning virtual lanes (VL) in a fibre channel switch is provided. The fibre channel switch element includes a virtual lane cache that can compare incoming frame parameters based on which virtual lanes may be assigned; and a register to store parameters used for virtual lane assignment. The method includes, determining if VL assignment is to be based on an incoming frame parameter or a programmed value; determining if an incoming frame is a preferred frame; and assigning a preferred routing priority if the incoming frame is designated as a preferred frame. The method also includes, determining if a fabric topology is known; and assigning virtual lanes based on a known fabric topology.Type: GrantFiled: July 20, 2004Date of Patent: April 28, 2009Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Edward C. Ross, William J Gustafson
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Patent number: 7466700Abstract: A method and system for implementing LUN based hard zoning in a fiber channel network is provided. A LUN field in a Fiber Channel SCSI command frame is compared with a list of LUNS that are allowed for a particular frame source; and the frame is forwarded if the LUN is allowed for the frame source. The comparison is performed by a port receiving the frame by using an address look up table (“ALUT”). Hard zoning is based on various frame fields and/or ALUT control codes. Also provided is a method for processing a reply to a SCSI REPORT LUN command from an initiator. The method includes, intercepting a reply to a REPORT LUN command; editing the reply to remove unauthorized LUNs; and sending the edited reply to the initiator.Type: GrantFiled: July 20, 2004Date of Patent: December 16, 2008Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, William J Gustafson, Gary M. Papenfuss
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Patent number: 7404020Abstract: A fibre channel switch element with an integrated fabric controller on a single chip is provided. The fabric controller including a processor module that can control various switch element functions; a serlizer/de-serializer for converting parallel data to serial data for transmission; an on-chip peripheral bus that allows communication between plural components and the processor module; a processor local bus and an interrupt controller that provides interrupts to the processor module. The integrated fabric controller also includes a flash controller and an external memory controller; an Ethernet controller; a Universal Asynchronous Receiver Transmitter (“UART”) module that performs serial to parallel conversion and vice-versa; an I2C module that performs serial to parallel and parallel to serial conversion; a general-purpose input/output interface; a real time clock module; an interrupt controller that can receive interrupts inputs from both internal and external sources; and a bridge to an internal PCI bus.Type: GrantFiled: July 20, 2004Date of Patent: July 22, 2008Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, William J. Gustafson, Leonard W. Haseman
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Patent number: 7319669Abstract: A system and method for transmitting and bundling network packets is provided. The incoming network packet size is determined and if the remote buffer space is sufficient to hold the network packet it is transmitted to the destination port. If the remote buffer space is not enough to hold the network packet it is discarded. The system includes an arbitration module that receives remote buffer space information and transmits the network packet if the remote buffer space has enough space to hold the packet. The arbitration module also determines if a second network packet is from a same source port having a same source virtual lane, and has the same destination virtual lane (bundling conditions). If the second network packet meets the bundling conditions, then it is transmitted after the first network packet, even if other packets were received before the second network packet.Type: GrantFiled: November 22, 2002Date of Patent: January 15, 2008Assignee: QLogic, CorporationInventors: James A. Kunz, Leonard W. Haseman, Mark A. Owen, William J. Gustafson
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Patent number: 6886141Abstract: A system and method for discarding expired network data packets is provided. A time stamp value is assigned to data packets that are received in a data packet queue, wherein the time stamp value is based on a counter value. The time stamp value is extracted after the counter value changes or a new data packet is received at the head of the data packet queue. The extracted time stamp value is then compared with the counter value. Data packets with expired timer value are discarded.Type: GrantFiled: October 7, 2002Date of Patent: April 26, 2005Assignee: QLogic CorporationInventors: James A. Kunz, William J Gustafson, Leonard W Haseman