Patents by Inventor William J. Scheraga

William J. Scheraga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5903425
    Abstract: A control circuit for providing fast turn-off of a PNP transistor with output transient protection. An embodiment of the invention provides a current amplifier coupled between a positive voltage supply line and the base of a PNP switching transistor and an input device for providing an input current to the current amplifier. The current amplifier provides a transitory reverse drive current to the base of the PNP switching transistor. The current amplifier and the input device both include transient blocking junctions that block current flow from a positive voltage transient in excess of the positive supply voltage. The current amplifier is a PNP drive transistor in the preferred embodiment. The PNP drive transistor provides a transitory reverse drive current to the base of the PNP switching transistor.
    Type: Grant
    Filed: June 2, 1997
    Date of Patent: May 11, 1999
    Assignee: Cherry Semiconductor Corporation
    Inventor: William J. Scheraga
  • Patent number: 5834964
    Abstract: A control circuit for providing fast turn on of a PNP transistor in which a capacitor charging current is boosted and provided to the base of the PNP transistor. An embodiment of the invention provides a current amplifier in parallel with a current source for coupling to the base of the PNP transistor. The PNP transistor is connected to a positive voltage supply. A capacitor is also coupled to the positive voltage supply for delivering a charging current amplifier. In a further embodiment, an NPN transistor has its base coupled to the capacitor and its collector coupled to the base of the PNP transistor for providing the drive current boost. A diode may be coupled to the capacitor for passing a discharge current to the capacitor when the PNP transistor is off and to block the capacitor current when the PNP transistor is being switched on. A PNP drive transistor may be coupled between the collector of the NPN transistor and the base of the PNP transistor.
    Type: Grant
    Filed: June 2, 1997
    Date of Patent: November 10, 1998
    Assignee: Cherry Semiconductor Corporation
    Inventor: William J. Scheraga
  • Patent number: 5789955
    Abstract: A current slew rate limiter for limiting the rate at which current is applied to the base of an NPN output transistor. Current is applied to the output transistor base via a first output port of a current splitter. The current provided by the second output port of the current splitter is fed back to the input of the current splitter via an NPN current mirror and a PNP current mirror connected in series. A current limiting resistor is provided in at least one of the input and output circuits of the PNP current mirror to limit the maximum output current to the base of the NPN output transistor.
    Type: Grant
    Filed: October 10, 1996
    Date of Patent: August 4, 1998
    Assignee: Cherry Semiconductor Corporation
    Inventor: William J. Scheraga
  • Patent number: 4779062
    Abstract: A short circuit limiter having at least one current sink transistor connected to a trip point voltage setting resistor. The trip point voltage setting resistor receives a current which is a function of a reference current. One of the current sink transistors has a base connected above the tip point voltage setting resistor. The emitter of one of the current sink transistors sets the trip point voltage and is connected to the output transistors. If there is a short circuit in a load, the increased current will cause the voltage connection between the output transistors and the current sink transistors to rise up to the trip point voltage at which point, base drive current will be diverted away from the output transistors and through the current sink transistors.
    Type: Grant
    Filed: March 24, 1987
    Date of Patent: October 18, 1988
    Assignee: Cherry Semiconductor Corporation
    Inventor: William J. Scheraga