Patents by Inventor William J. Westerinen
William J. Westerinen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080183712Abstract: A security module manages authorization of additional computing resources, either additional processing power in a server, or additional servers in a server enclosure responsive to an authorized message. The authorized message may be generated at a management node and may include a provisioning license for use by the security module to set a duration for use of the additional computing resources. A baseboard management controller may be house the security module or each controllable resource may house an associated security module. The baseboard management controller may store the authorized message when the security module is not active and forward the message after the security module has been activated.Type: ApplicationFiled: January 29, 2007Publication date: July 31, 2008Inventors: William J. Westerinen, Jeffrey Alan Herold, Thomas G. Phillips, Martin H. Hall
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Patent number: 7406446Abstract: A computer is adapted for use in different operating modes by configuring an output controller, such as a graphics processing unit, to screen output signals prior to presenting them to the output device. A secure environment in the output controller verifies a digital signature or a hash of the output signal to determine whether the output signal is compatible with the current mode of operation. Thus only authorized output signals are presented when the computer is operating in a limited function mode, such as when metered usage time is expired. The apparatus and method also disclose similar output signal screening for determining whether the computer should be returned from a standby, or no-metering, mode to an active, or metered mode.Type: GrantFiled: March 8, 2005Date of Patent: July 29, 2008Assignee: Microsoft CorporationInventors: Alexander Frank, William J. Westerinen
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Patent number: 7395452Abstract: A method of preventing data loss in a data storage system includes supplying write data to a high speed volatile write buffer and supplying electrical power from an energy storage device upon detection of a primary power loss event. The backup electrical power is supplied to the write buffer and nonvolatile cache. Under backup power, the write data is transferred into the nonvolatile cache and the backup power is removed. Upon regaining main power, a data presence indication triggers a transfer of the write data from the nonvolatile cache to the long term storage media. The method may be implemented for a system to protect it from inadvertent power losses or it may implemented in a system where the long term storage device is power cycled to save power. The energy storage device is not necessarily needed in the power cycled system unless power failure protection is also desired.Type: GrantFiled: September 24, 2004Date of Patent: July 1, 2008Assignee: Microsoft CorporationInventors: Clark D. Nicholson, William J. Westerinen
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Patent number: 7392429Abstract: A system and method for maintaining persistent data during an unexpected power loss uses a memory controller and a supplemental power source. An entity running on the computer, for example, an application program, a utility, the operating system or other entity, may identify data for preservation using an application program interface. The application program interface may be provided by the memory controller. A sensor determines when an unexpected power loss has occurred and signals the memory controller. Using power from the supplemental power source, i.e. a battery or capacitor, the memory controller copies the identified data to a non-volatile memory. The memory controller may set a flag to indicate that preserved data is available for later recovery.Type: GrantFiled: December 22, 2004Date of Patent: June 24, 2008Assignee: Microsoft CorporationInventors: Alexander Frank, Mark C. Light, William J. Westerinen
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Publication number: 20080148036Abstract: A security module for a pay-per-use computer supplies an appropriate BIOS for a given mode of operation. A power manager in the security module powers only essential circuits until the BIOS is operational to help prevent substitution of a non-authorized BIOS. The security module also includes a capability to monitor and restrict data lines on a bus between a main computer processor and computer system memory. When the computer is operating in a restricted use mode, data lines may be restricted to allow only minimal access to the computer system memory. Bus transactions may be monitored to ensure that only valid transactions are occurring and are within the designated memory space.Type: ApplicationFiled: December 18, 2006Publication date: June 19, 2008Inventors: William J. Westerinen, Todd L. Carpenter, Alexander Frank, Shon Schmidt, Stephen Richard Drake
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Publication number: 20080148065Abstract: A computer is configured for either full operation with metering or limited mode operation. When in limited mode operation, the system memory may be partitioned into active and restricted memory. The active memory may be limited to an amount needed to execute a limited mode operation application. The remaining restricted memory may be made inaccessible to the computer's processor. To verify the restricted memory remains unused, it may be filled with a pattern and the pattern periodically verified to determine that unauthorized programs are not using the restricted memory.Type: ApplicationFiled: December 18, 2006Publication date: June 19, 2008Inventors: William J. Westerinen, Todd L. Carpenter
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Patent number: 7353390Abstract: A system and method for enabling a network device to resume network activities in a secure manner on a communication network when network activities are generally blocked by protective security measures implemented by network security modules is presented. During its periodic update request, a network security module blocking the network activities of the network device requests updated security measures from an administrator-configurable security service. The security service determines whether the network security module/network device may receive a relaxed set of security measures that, when implemented by the network security module, enable the network device to resume some network activities. If the security service determines that the network security module/network device may receive a relaxed set of security measures, the relaxed set of security measures are returned to and implemented on the network security module, thereby enabling the network device to resume some network activities.Type: GrantFiled: August 20, 2004Date of Patent: April 1, 2008Assignee: Microsoft CorporationInventors: Adrian M. Chandley, Thomas G. Phillips, William J. Westerinen
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Patent number: 7337442Abstract: Cooperatively scheduling hardware resources by providing information on shared resources within processor packages to the operating system. Logical processors may be included in packages in which some or all processor execution resources are shared among logical processors. In order to better schedule thread execution, information regarding which logical processors are sharing processor execution resources and information regarding which system resources are shared among processor packages is provided to the operating system. Extensions to the SRAT (static resource affinity table) can be used to provide this information.Type: GrantFiled: December 3, 2002Date of Patent: February 26, 2008Assignee: Microsoft CorporationInventors: Son VoBa, Valerie R. See, Tony Dwayne Pierce, William J. Westerinen
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Publication number: 20080047024Abstract: To enforce contractual usage terms on an electronic device, such as a computer, a security function or circuit may consume all the devices processing power except enough to run a restoration program. The security function may provide problems or challenges for the processor to solve that are designed to consume all but a fraction of the processors compute power. Another embodiment occupies nearly all the device's system memory with a pattern and requires the device to respond to requests related to the memory contents. Both approaches place time limits on the response to help ensure the resource allocations are not being avoided. The security circuit may reset the computer when an incorrect or when no response is received within the time limit.Type: ApplicationFiled: June 20, 2006Publication date: February 21, 2008Applicant: MICROSOFT CORPORATIONInventors: Alexander Frank, Isaac P. Ahdout, William J. Westerinen
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Patent number: 7321209Abstract: A method and system for buffering power for rotating media devices. A power management circuit includes a power augmentation circuit and a power storage device. The power augmentation circuit is arranged to sense when the storage device motor is accelerating and to supply additional power to the storage device motor in response thereto. The power storage device is arranged to store the additional power. The power storage device may be trickle charged from the system power supply and may also be charged as power is recaptured from the storage device motor as it decelerates.Type: GrantFiled: March 23, 2005Date of Patent: January 22, 2008Assignee: Microsoft CorporationInventors: William J. Westerinen, Stephen R. Drake
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Publication number: 20080005560Abstract: Techniques are described which provide an independent computation environment. The independent computation environment is contained at least in part in a set of one or more hardware components and configured to host a provisioning module that is executable to provision functionality of the computing device according to a wide variety of factors. In an implementation, when the provisioning module determines that particular functionality is referenced in an inclusion list, the computing device is permitted to access the particular functionality. When the provisioning module determines that the particular functionality is referenced in an exclusion list, the computing device is prevented from accessing the particular functionality.Type: ApplicationFiled: June 29, 2006Publication date: January 3, 2008Applicant: Microsoft CorporationInventors: James Duffus, Thomas G. Phillips, Alexander Frank, William J. Westerinen
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Patent number: 7275167Abstract: A computing system that incorporates an auxiliary processor to the main system processor. The auxiliary system utilizes a separate application runtime for processes and is capable of operating even when the primary system is in an off state. Methods for load-balancing are provided based on computing needs respective to power consumption requirements. Processes that are not computationally intensive are processed by a low-power, auxiliary processor. In addition, peripheral components accessible to the overall computing system are shared.Type: GrantFiled: October 10, 2006Date of Patent: September 25, 2007Assignee: Microsoft CorporationInventors: Adrian M. Chandley, Chad L. Magendanz, Christopher Allen Schoppa, Dale C. Crosier, Jason Michael Anderson, Juan J. Perez, Kenneth W. Stufflebeam, Jr., Pasquale DeMaio, Steven T. Kaneko, William J. Westerinen
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Patent number: 7240228Abstract: A method and system for auxiliary processing of information for a computing device. By simplifying the user managed power states to On and Standby, the computing device preserves its execution context by default when the machine is powered down. As a result, the computing device is made available for use even when it appears to be powered down. The computer hardware and software is capable of responding immediately to network or communication activity, user input, and other events. While the computer is in Standby, it is alert and able to handle background tasks that do not require user interaction. Activities such as answering phone calls, handling voice mail, displaying new e-mail, record voice messages, browsing the Internet, recording TV shows and so forth occur without the user having to turn on the computer.Type: GrantFiled: May 5, 2003Date of Patent: July 3, 2007Assignee: Microsoft CorporationInventors: Eric Gould Bear, Chad Magendanz, Aditha May Adams, Carl Ledbetter, Steve Kaneko, Chris Schoppa, Adrian Chandley, William J. Westerinen, Dale C. Crosier
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Patent number: 7228444Abstract: A mechanism is provided for a personal computer to preserve user and system state data in the event of an AC power failure when the computer is in a standby state. When the AC power failure occurs, a switchover circuit connects a rechargeable energy storage medium, such as a rechargeable battery, to the power supply of the computer for powering components of computer, and the computer is awaken. A critical battery alarm is then issued to trigger the operating system of the computer to perform a transition into a hibernation state, during which the state data of the computer are persistently stored. The energy storage medium is disconnected from the power supply after the computer system has entered hibernation.Type: GrantFiled: January 30, 2006Date of Patent: June 5, 2007Assignee: Microsoft CorporationInventors: William J. Westerinen, Jason M. Anderson, Allen Marshall, Tony D. Pierce
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Patent number: 7221331Abstract: A method and system for auxiliary display of information for a computing device. An auxiliary display is integrated with a computing system to provide an area where notifications can be peripherally presented off-screen. Whenever a background task sends a notification to the main display of the system, the notification may be redirected to appear instead on the auxiliary display. A user may then glance at the notification appearing on the auxiliary display to be informed of the message without interruption from the current task onscreen. Any type of information may be presented on the auxiliary display including incoming communications, meeting reminders, system alerts, and information from Internet subscription services. The auxiliary display may be placed on the central processor chassis or on the monitor border along with LED indicator lights to provide simple peripheral-vision notification. By pressing a button, a user may obtain additional detailed follow-up information.Type: GrantFiled: May 5, 2003Date of Patent: May 22, 2007Assignee: Microsoft CorporationInventors: Eric Gould Bear, Chad Magendanz, Aditha May Adams, Carl Ledbetter, Steve Kaneko, Chris Schoppa, Adrian M. Chandley, William J. Westerinen, Dale C. Crosier, Robert Scott Plank
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Patent number: 7152171Abstract: A computing system that incorporates an auxiliary processor to the main system processor. The auxiliary system utilizes a separate application runtime for processes and is capable of operating even when the primary system is in an off state. Methods for load-balancing are provided based on computing needs respective to power consumption requirements. Processes that are not computationally intensive are processed by a low-power, auxiliary processor. In addition, peripheral components accessible to the overall computing system are shared.Type: GrantFiled: April 28, 2004Date of Patent: December 19, 2006Assignee: Microsoft CorporationInventors: Adrian M. Chandley, Chad L. Magendanz, Christopher Allen Schoppa, Dale C. Crosier, Jason Michael Anderson, Juan J. Perez, Kenneth W. Stufflebeam, Jr., Pasquale DeMaio, Steven T. Kaneko, William J. Westerinen
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Patent number: 7136042Abstract: A display controller that permits more than one display to be operated by a single cable and a single display adapter. The display controller provides custom EDID information to a computer to which it is attached. The custom EDID information may include information about the single virtual display surface provided by all displays, and may include information about each of the individual monitors or displays, including the location of the individual displays in the single composite display surface. The single composite display surface may be utilized by computers that are not capable of recognizing the EDID for the multiple display system. If the computer does recognize the EDID for the multiple display system, the operating system of the computer and/or applications running on the computer may understand and utilize the heterogeneous nature of the display surface and may optimize display quality and presentation for a user.Type: GrantFiled: October 29, 2002Date of Patent: November 14, 2006Assignee: Microsoft CorporationInventors: Chad L. Magendanz, William J. Westerinen, Dawson Yee, William Chambers Powell, III
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Patent number: 7131011Abstract: A mechanism is provided for a personal computer to preserve user and system state data in the event of an AC power failure when the computer is in a standby state. When the AC power failure occurs, a switchover circuit connects a rechargeable energy storage medium, such as a rechargeable battery, to the power supply of the computer for powering components of computer, and the computer is awaken. A critical battery alarm is then issued to trigger the operating system of the computer to perform a transition into a hibernation state, during which the state data of the computer are persistently stored. The energy storage medium is disconnected from the power supply after the computer system has entered hibernation.Type: GrantFiled: March 6, 2003Date of Patent: October 31, 2006Assignee: Microsoft CorporationInventors: William J. Westerinen, Jason M. Anderson, Allen Marshall, Tony D. Pierce, Shaun Wiley
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Patent number: 7036040Abstract: A method and apparatus is provided that provides a reliable diskless network-bootable computers using a local non-volatile memory (NVM) cache. The NVM cache is used by the computer when the network is temporarily unavailable or slow. The cache is later synchronized with a remote boot server having remote storage volumes when network conditions improve. It is determined if data is to be stored in the NVM cache or the remote storage volume. Data sent to the remote storage volume is transactionally written and the data is cached in the NVM cache if a network outage is occurring or a transaction complete message has not been received. The data stored in the NVM cache allows the user to continue operating during network outages and the computer can be cold-booted using the data in the NVM cache if the network is unavailable.Type: GrantFiled: November 26, 2002Date of Patent: April 25, 2006Assignee: Microsoft CorporationInventors: Clark D. Nicholson, William J. Westerinen, Cenk Ergan, Michael R. Fortin, Mehmet Iyigun
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Patent number: 6867985Abstract: A computer system uses a large heat sink to provide noiseless cooling, thereby avoiding the need for a conventional cooling fan that can be very noisy. The heat sink forms a part of a chassis that contains the motherboard and hard drive of the computer. The motherboard and hard drive are mounted in the chassis to provide thermal conduction from the microprocessor on the motherboard and from the hard drive to the heat sink, which dissipates the heat in the ambient air. Enhanced EMI shielding is provided by placing a shroud with vented top and bottom over the chassis containing the motherboard and the hard drive.Type: GrantFiled: February 11, 2003Date of Patent: March 15, 2005Assignee: Microsoft CorporationInventors: William J. Westerinen, Simon Yingchun Zhang