Patents by Inventor William K. Gross

William K. Gross has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6742146
    Abstract: The invention is directed to techniques that include an error detection code (e.g., a CRC code) and cleared bytes (e.g., zeroes) with data (e.g., CKD data). The use of cleared bytes with CKD data enables detection of corrupt CKD data by simply generating a CRC code based on an entire data block and comparing that generated CRC code with an initial CRC code appended to the CKD data within that data block. One arrangement of the invention is directed to a data storage system that includes a circuit having a memory pipeline that receives a stream of data elements, and provides a series of byte groups that includes the stream of data elements, an error detection code and a set of cleared bytes to a set of storage devices. Each of the series of byte groups provided by the memory pipeline has a same byte width. The inclusion of the error detection code and the set of cleared bytes enables consistent alignment of each byte group in the series.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: May 25, 2004
    Assignee: EMC Corporation
    Inventors: William K. Gross, Stephen L. Scaringella, Victor W. Tung
  • Publication number: 20020112205
    Abstract: The invention is directed to techniques that include an error detection code (e.g., a CRC code) and cleared bytes (e.g., zeroes) with data (e.g., CKD data). The use of cleared bytes with CKD data enables detection of corrupt CKD data by simply generating a CRC code based on an entire data block and comparing that generated CRC code with an initial CRC code appended to the CKD data within that data block. One arrangement of the invention is directed to a data storage system that includes a circuit having a memory pipeline that receives a stream of data elements, and provides a series of byte groups that includes the stream of data elements, an error detection code and a set of cleared bytes to a set of storage devices. Each of the series of byte groups provided by the memory pipeline has a same byte width. The inclusion of the error detection code and the set of cleared bytes enables consistent alignment of each byte group in the series.
    Type: Application
    Filed: February 14, 2001
    Publication date: August 15, 2002
    Inventors: William K. Gross, Stephen L. Scaringella, Victor W. Tung
  • Patent number: D265859
    Type: Grant
    Filed: October 17, 1979
    Date of Patent: August 17, 1982
    Inventor: William K. Gross